IC Package Interference-Fit Support for Height Reduction

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Solution Overview

Problem

Existing integrated circuit package systems face challenges in reducing cost, improving yield, and achieving a thinner profile while addressing issues like delamination and corrosion, especially under extreme environmental conditions, with conventional die-attach paddles limiting package height reduction and increasing manufacturing complexity.

Innovation Solution

The integration of an interference-fit feature in the integrated circuit die, which allows for a support element to be fitted without adhesives, reducing surface contact and manufacturing complexity, and encapsulating the die to enhance reliability and reduce package height.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional die-attach paddles are used to provide support and planar rigidity, then functional utility is achieved, but package height reduction is limited and delamination occurs

Engineering Contradiction:
Improvedelamination resistanceVSAvoidpackage height
Core Design Contradiction:
ReliabilityVSLength of stationary object

Solution Approach 1:

The patent removes the conventional die-attach paddle from the package structure. Instead of using a separate paddle component, the support structure is integrated directly into the substrate, eliminating the interface between the paddle and encapsulation that causes delamination while reducing overall package height

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The substrate and support structure are merged into a single integrated component. The substrate itself provides the mechanical support and planar rigidity previously provided by a separate die-attach paddle, eliminating the need for adhesive bonding and reducing package height

Inventive Principle:
Principle #5Merging (Combining)

2Adaptability or versatility

If more integrated circuits are integrated into a single package, then functionality increases, but manufacturing complexity and cost increase

Engineering Contradiction:
ImprovefunctionalityVSAvoidmanufacturing complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The substrate serves multiple functions simultaneously: it provides mechanical support, electrical interconnection, and structural integration for multiple die. This multi-functionality allows increased circuit integration without proportionally increasing manufacturing complexity, as the same substrate structure fulfills multiple roles

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The package structure is segmented into independent die mounted on a common substrate, allowing each die to be manufactured separately using mature processes and then integrated. This segmentation enables functional expansion without requiring complex co-processing of all circuits

Inventive Principle:
Principle #1Segmentation

3Strength

If adhesive bonding is used to attach die to support structures, then structural integrity is achieved, but delamination and corrosion occur under extreme conditions

Engineering Contradiction:
Improvestructural integrityVSAvoidresistance to delamination and corrosion
Core Design Contradiction:
StrengthVSReliability

Solution Approach 1:

The patent eliminates adhesive bonding by removing the die-attach paddle that required adhesive for attachment. The direct mechanical integration of the support structure into the substrate provides structural integrity without organic adhesives that are susceptible to delamination and corrosion in extreme environments

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS7977778B2Integrated circuit package system with interference-fit feature
Publication Date: 2011.07.12 STATS CHIPPAC LTD
  • US7977778B2 patent drawing
  • US7977778B2 patent drawing
  • US7977778B2 patent drawing

AI summary

An integrated circuit package system is provided including forming an integrated circuit die, forming an interference-fit feature in the integrated circuit die, fitting a support element within the interference-fit feature, connecting an external interconnect and the integrated circuit die, and encapsulating the integrated circuit die.