Multi-Plane IC Package Interconnect Layout for Higher Lead Density

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Solution Overview

Problem

Existing integrated circuit (IC) packages face limitations in lead density due to the conventional arrangement of interconnects, which restricts the number of leads that can be packed within a given footprint, leading to inefficiencies in signal transmission and increased package size.

Innovation Solution

The IC package employs multiple interconnects encased in a mold compound, with leads arranged in interleaving rows to increase lead density, allowing for a pitch of less than 0.5 millimeters, such as about 0.32 mm, without reducing lead width or increasing package footprint, by using a first and second interconnect with leads protruding from opposing sides in different planes and being galvanically isolated.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If conventional interconnect arrangement is used, then manufacturing simplicity is maintained, but lead density is limited

Engineering Contradiction:
Improvelead densityVSAvoidinterconnect arrangement complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The interconnect structure is divided into multiple independent interconnects (first interconnect and second interconnect), each with its own leads and die pad. This segmentation allows multiple lead sets to coexist within a single package, increasing lead density without compromising manufacturing simplicity

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The second interconnect is positioned in a different plane (second plane spaced apart from first plane) than the first interconnect, utilizing the vertical dimension to pack more leads into the same footprint. This three-dimensional arrangement enables pitch reduction to less than 0.5mm while maintaining ease of manufacture

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Quantity of substance

If lead pitch is reduced to increase lead density, then more leads fit in given footprint, but lead width may be reduced compromising signal transmission

Engineering Contradiction:
Improvenumber of leadsVSAvoidlead width
Core Design Contradiction:
Quantity of substanceVSLength of moving object

Solution Approach 1:

By arranging interconnects in multiple planes vertically stacked, the patent achieves pitch reduction to less than 0.5mm (e.g., 0.32mm) while maintaining adequate lead width. The vertical separation between planes prevents lead interference and allows sufficient width for each lead to maintain signal transmission capability

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Quantity of substance

If multiple interconnects are used to increase lead density, then lead density improves, but package complexity increases

Engineering Contradiction:
Improvelead densityVSAvoidpackage structure
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

Multiple independent interconnects (first interconnect and second interconnect with their respective leads and die pads) are merged into a single integrated package structure enclosed by one mold compound. This merging achieves high lead density while maintaining a unified, manageable package structure that does not significantly increase overall complexity

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS20240347425A1Integrated circuit package with multiple interconnects
Publication Date: 2024.10.17 TEXAS INSTRUMENTS INC
  • US20240347425A1 patent drawing
  • US20240347425A1 patent drawing
  • US20240347425A1 patent drawing

AI summary

An integrated circuit (IC) package includes a mold compound. A first interconnect of the IC package is encased in the mold compound. The first interconnect includes a first set of leads protruding from a first side of the mold compound along a first row and a second set of leads protruding from a second side of the mold compound along a second row, wherein the first row and the second row are in a first plane. A second interconnect of the IC package is also encased in the mold compound. The second interconnect includes a third set of leads protruding from the first side of the mold compound along a third row and a fourth set of leads protruding from the second side of the mold compound along a fourth row. The third row and the fourth row are in a second plane.