IC Package Leads with Exposed Sides for Density
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current integrated circuit packaging technologies face limitations in increasing density due to physical size constraints and the need for additional spacers in multi-chip packages, which restricts the number of dice that can be stacked and leads to increased costs and complexity.
Innovation Solution
The proposed integrated circuit package system features a stack with a non-elevated and elevated encapsulation portion, allowing for internal interconnects and mechanical rigidity while exposing specific sides of the leads, enabling efficient stacking and reducing the need for separate spacers, thus enhancing density and reducing manufacturing complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multi-chip packages are used to increase integrated circuit density, then the number of integrated circuits per package increases, but the package size increases and requires additional spacers
Solution Approach 1:
The patent merges the function of separate spacers with the lead structure itself. The leads are designed to extend beyond the encapsulation body, providing both mechanical support and positioning functions that would otherwise require separate spacer components. This integration eliminates the need for additional discrete spacer parts while maintaining the ability to stack multiple integrated circuits vertically.
Solution Approach 2:
The patent transitions from a planar arrangement to a three-dimensional stacked configuration. By extending leads vertically beyond the encapsulation body and stacking integrated circuits in the vertical dimension, the design achieves higher density without proportionally increasing the horizontal package footprint. This dimensional transition allows multiple chips to be arranged in layers rather than requiring a larger flat area.
2Quantity of substance
If multi-chip packages are used to increase integrated circuit density, then the number of integrated circuits per package increases, but device complexity increases due to additional spacers
Solution Approach 1:
The patent combines multiple functions into the lead structure itself. The leads serve as both electrical interconnects and mechanical positioning elements, eliminating the need for separate spacer components. This reduction in the number of discrete parts simplifies the overall package structure and reduces manufacturing complexity while still enabling multi-chip stacking.
Solution Approach 2:
The leads are designed to perform multiple functions: electrical interconnection, mechanical support, and positioning of integrated circuits. By making the leads multi-functional, the patent eliminates the need for dedicated spacer components, thereby reducing device complexity while maintaining the capability to stack multiple chips.
3Reliability
If leads are fully enclosed in encapsulation, then protection is improved, but accessibility of leads for connection is reduced
Solution Approach 1:
The encapsulation is segmented into different levels: a first encapsulation body that protects the integrated circuits and internal interconnects, and extended lead portions that protrude beyond this encapsulation. This segmentation allows the leads to be both protected (where enclosed) and accessible (where extended), enabling connections while maintaining protection for the sensitive internal structures.
Solution Approach 2:
Different portions of the lead structure have different degrees of encapsulation. The internal interconnects and integrated circuits are fully enclosed for maximum protection, while the lead ends that require connection remain exposed. This local differentiation of encapsulation quality provides protection where needed while maintaining accessibility where required for operation.
Data Source
AI summary
An integrated circuit package system includes forming an integrated circuit stack having a bottom non-active side and a top non-active side; connecting an internal interconnect between a lead, having a top side and a bottom side, and the integrated circuit stack; and forming an encapsulation, having both a non-elevated portion and an elevated portion, around the integrated circuit stack and the internal interconnect with the top side exposed at the non-elevated portion, and with the bottom side, the bottom non-active side, and the top non-active side exposed.