IC Package Protective Cap for Gap-Fill Dielectric Crack Resistance

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Solution Overview

Problem

The semiconductor industry faces challenges in reducing the risk of cracks in gap-filling dielectrics during processing due to mechanical and thermal stresses, which can lead to reliability issues in integrated circuit die structures.

Innovation Solution

A ductile protective cap is formed over the gap-filling dielectrics between integrated circuit dies, made of materials like gold, copper, or aluminum, to absorb stress and prevent crack propagation, while an isolation layer is used to further protect the dielectric layers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Stability of the object's composition

If gap-filling dielectrics are used between integrated circuit dies, then the structural integrity and electrical isolation are improved, but the risk of cracks during processing due to mechanical and thermal stresses increases

Engineering Contradiction:
Improvestructural integrityVSAvoidcrack resistance
Core Design Contradiction:
Stability of the object's compositionVSReliability

Solution Approach 1:

A ductile protective cap layer is formed over the gap-filling dielectric material before subsequent processing steps. This protective cap absorbs mechanical and thermal stresses during processing, preventing cracks from forming or propagating in the underlying gap-filling dielectric material. The protective cap acts as a cushion that protects the brittle dielectric from stress-induced damage.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Solution Approach 2:

The protective cap is made from a ductile material with different mechanical properties than the gap-filling dielectric. This material parameter change allows the protective cap to deform plastically under stress rather than fracturing like the dielectric material, thereby protecting it from crack formation while maintaining structural integrity.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If multiple tiers of integrated circuit dies are stacked to increase integration density, then the productivity and miniaturization are improved, but the mechanical stress and thermal stress on the die structure increase

Engineering Contradiction:
Improveintegration densityVSAvoidmechanical and thermal stress
Core Design Contradiction:
ProductivityVSStress or pressure

Solution Approach 1:

The die structure is segmented into multiple tiers of integrated circuit dies separated by gap-filling dielectric materials. Between these tiers, protective caps are placed to individually protect each interface region from stress. This segmentation allows the structure to handle higher integration density while distributing and managing the mechanical and thermal stresses at each interface.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Protective cap layers are introduced as intermediary elements between the integrated circuit dies and the gap-filling dielectric materials. These intermediaries absorb and dissipate mechanical and thermal stresses that arise from stacking multiple dies, preventing stress transmission that could damage the delicate die structures or cause crack propagation.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively reduces the risk of damage to the die structure by absorbing mechanical and thermal stresses, thereby increasing the reliability and integrity of the integrated circuit die structure.

Implementation Method 1

A ductile protective cap is formed over the gap-filling dielectrics between integrated circuit dies, made of materials like gold, copper, or aluminum, to absorb stress and prevent crack propagation

Methodology Applied
Scientific EffectStress absorption: Absorption (physical)

Data Source

PatentUS20230378012A1Integrated Circuit Packages and Methods of Forming the Same
Publication Date: 2023.11.23 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20230378012A1 patent drawing
  • US20230378012A1 patent drawing
  • US20230378012A1 patent drawing

AI summary

In an embodiment, a device includes: a first integrated circuit die; a second integrated circuit die; a gap-fill dielectric between a first sidewall of the first integrated circuit die and a second sidewall of the second integrated circuit die; a protective cap overlapping the gap-fill dielectric, the first sidewall of the first integrated circuit die, and the second sidewall of the second integrated circuit die; and an isolation layer around the protective cap, the isolation layer disposed on the first integrated circuit die, and the second integrated circuit die.