IC Package Support Protective Layer Seed Etch

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Solution Overview

Problem

Conventional semi-additive processes in IC packaging fabrication result in significant thinning and variability of fine electroplated features due to seed etch, compromising their dimensions and reliability.

Innovation Solution

The implementation of a protective layer on the side surfaces of conductive features during seed etch, which prevents material removal from these surfaces, thereby preserving the dimensions and reducing variability of fine electroplated features.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If a seed layer is etched away after electroplating in conventional semi-additive processes, then the photoresist can be removed and the process can continue, but the side surfaces of the electroplated features are thinned and their dimensions become variable

Engineering Contradiction:

Improvephotoresist removalVSAvoidelectroplated feature dimensions

Core Design Contradiction:

Ease of manufactureVSManufacturing precision

Solution Approach 1:

A protective layer is introduced as an intermediary substance between the etchant and the electroplated features. This protective layer selectively protects the side surfaces of the electroplated features from etching while allowing the photoresist to be removed, thus preventing dimensional thinning and variability of the electroplated features during the manufacturing process

Inventive Principle:

Principle #24Intermediary (Mediator)

2Productivity

If the seed layer is removed after electroplating, then the process can proceed to next steps, but significant material removal from side surfaces occurs compromising feature reliability

Engineering Contradiction:

Improveprocess continuityVSAvoidelectroplated feature reliability

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The protective layer serves as a mediator that enables process continuity by allowing seed layer removal and photoresist stripping without compromising the integrity of the electroplated features. The protective layer is applied conformally to the side surfaces and selectively removed later, ensuring features maintain their dimensions throughout the manufacturing process

Inventive Principle:

Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively minimizes the impact of seed etch on fine electroplated features, maintaining their desired dimensions and reducing variability, thus enhancing the reliability and consistency of IC package manufacturing.

Implementation Method 1

The implementation of a protective layer on the side surfaces of conductive features during seed etch, which prevents material removal from these surfaces

Methodology Applied

Scientific EffectPhysical barrier protection:

Implementation Method 2

conventional semi-additive processes in IC packaging fabrication result in significant thinning and variability of fine electroplated features

Methodology Applied

Scientific EffectElectroplating: Electroplating

Data Source

PatentUS11521923B2Integrated circuit package supports

Publication Date: 2022.12.06 INTEL CORP

AI summary

Disclosed herein are integrated circuit (IC) package supports and related apparatuses and methods. For example, in some embodiments, an IC package support may include a layer of dielectric material; a conductive pad at least partially on a top surface of the layer of dielectric material; and a layer of material on side surfaces of the conductive pad, wherein the layer of material does not extend onto the top surface of the layer of dielectric material. Other embodiments are also disclosed.