IC Package Trench Design for Warpage Stress Reduction
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Solution Overview
Problem
Current package-on-package (PoP) stacking techniques face challenges with warpage issues due to thermal expansion and rigidity differences, leading to potential damage of integrated circuit dies and interconnects, limiting miniaturization and increasing manufacturing complexity.
Innovation Solution
The method involves fabricating a base package substrate with a trench adjacent to vertical insertion cavities to reduce warpage stress, using a package body formed around the integrated circuit die and stacking interconnects, and employing vertical insertion cavities to enhance electrical connectivity and reduce keep-out zones.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If package-on-package stacking is implemented to increase IC density, then packaging density improves, but warpage and mechanical damage occur due to thermal expansion and rigidity differences
Solution Approach 1:
The patent applies local quality by creating a trench structure at specific locations within the package body where thermal stress concentrates. This localized structural modification allows the package to better withstand thermal expansion differences between stacked components, preventing warpage while maintaining high IC density through PoP stacking.
Solution Approach 2:
The package body is segmented by introducing trenches that divide the continuous structure into regions that can independently accommodate thermal expansion. This segmentation reduces the overall warpage stress by allowing controlled deformation in specific zones rather than across the entire package structure.
2Length of moving object
If package size is reduced to meet miniaturization requirements, then device thickness decreases, but warpage control becomes more difficult
Solution Approach 1:
By introducing trenches at strategically located positions within the package body, the patent creates localized stress relief zones that compensate for the reduced overall package size. These local structural features maintain warpage control even as the total package dimensions are reduced to meet miniaturization requirements.
3Device complexity
If conventional PoP stacking is used without additional structural support, then device complexity is reduced, but die damage and interconnect fracture occur
Solution Approach 1:
The trenches are formed as part of the package body structure before the stacking process is completed. This preliminary structural preparation ensures that warpage stress is managed from the outset, preventing die damage and interconnect fracture during subsequent assembly and operation without requiring additional complex support structures.
Data Source
AI summary
A method of manufacture of an integrated circuit packaging system includes: fabricating a base package substrate having a component side and a system side; coupling a first integrated circuit die on the component side; coupling stacking interconnects on the component side around the first integrated circuit die; forming a package body on the component side, the first integrated circuit die, and the stacking interconnects; forming vertical insertion cavities through the package body and on the stacking interconnects; and forming a trench, in the package body, adjacent to the vertical insertion cavities for reducing a package warping stress.