IC Package Support Structure for High-Density Via Interconnects
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Solution Overview
Problem
Conventional integrated circuit (IC) package substrates face limitations in achieving high interconnect density without compromising mechanical and electrical properties, particularly in high-bandwidth, small form factor applications, due to issues like high loss tangents and coefficients of thermal expansion in photoimageable dielectrics.
Innovation Solution
The use of non-photoimageable dielectric materials with conductive vias of less than 20 microns in diameter, combined with dielectric planarization and self-aligned features, allows for increased metal volume and interconnect density, reducing mechanical and electrical drawbacks while maintaining reliability and cost-effectiveness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If photoimageable dielectric materials are used to achieve high interconnect density, then manufacturing precision is improved, but mechanical stability deteriorates due to high loss tangents and coefficients of thermal expansion
Solution Approach 1:
The patent changes the fundamental parameter of dielectric material selection from photoimageable to non-photoimageable materials. This material substitution resolves the contradiction by providing both the mechanical stability needed (lower loss tangents and thermal expansion coefficients) and the capability to achieve high interconnect density through advanced patterning processes like self-aligned via formation
Solution Approach 2:
The patent employs composite material structures combining non-photoimageable dielectric materials with specific filler compositions and conductive via structures. This composite approach enables simultaneous achievement of mechanical stability through material composition control and high interconnect density through integrated structural design
2Stability of the object's composition
If photoimageable dielectric materials with high filler particle loading are used to improve mechanical stability, then mechanical stability is improved, but interconnect density deteriorates due to increased scattering
Solution Approach 1:
The patent changes the material system from photoimageable to non-photoimageable dielectrics, fundamentally altering the relationship between filler loading and performance. This enables high filler loading for mechanical stability without the scattering limitations that plague photoimageable systems, as the non-photoimageable materials use different curing and patterning mechanisms
Solution Approach 2:
The patent replaces the photo-based patterning mechanism (optical system) with alternative patterning approaches suitable for non-photoimageable materials. This substitution eliminates the optical scattering issues that limit interconnect density in photoimageable systems while maintaining the ability to achieve precise, high-density interconnect structures
3Ease of manufacture
If conventional photoimageable dielectrics are used, then ease of manufacture is maintained, but communication bandwidth deteriorates due to high loss tangents
Solution Approach 1:
The patent changes the dielectric material class to non-photoimageable materials with inherently lower loss tangents and thermal expansion coefficients. This parameter change directly reduces energy loss and improves communication bandwidth while the associated fabrication processes maintain manufacturing feasibility through established semiconductor manufacturing techniques
4Stability of the object's composition
If non-photoimageable dielectric materials are used, then mechanical stability is improved and thermal expansion is reduced, but manufacturing complexity increases
Solution Approach 1:
The patent applies preliminary action by forming self-aligned features and conductive vias during the dielectric planarization process itself, rather than requiring separate subsequent steps. This integration of operations into the planarization flow reduces overall manufacturing complexity despite using advanced non-photoimageable materials
Solution Approach 2:
The patent merges multiple manufacturing operations into the dielectric planarization process, combining material deposition, via formation, and alignment steps into an integrated process flow. This merging reduces the total number of discrete manufacturing steps and simplifies production despite the use of sophisticated non-photoimageable dielectric materials
Data Source
AI summary
Disclosed herein are integrated circuit (IC) package supports and related apparatuses and methods. For example, in some embodiments, a method for forming an IC package support may include forming a first dielectric material having a surface; forming a first conductive via in the first dielectric material, wherein the first conductive via has tapered sidewalls with an angle that is equal to or less than 80 degrees relative to the surface of the first dielectric material; forming a second dielectric material, having a surface, on the first dielectric material; and forming a second conductive via in the second dielectric material, wherein the second conductive via is electrically coupled to the first conductive via, has tapered sidewalls with an angle that is greater than 80 degrees relative to the surface of the second dielectric material, and a maximum diameter between 2 microns and 20 microns.