IC Package Assembly Yield Optimization via Die Pool Analysis

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Solution Overview

Problem

Conventional fabrication techniques for chip packages often result in unsatisfactory product yield, leading to increased fabrication costs due to unmatched dies in chip packages with multiple dies arranged across a substrate.

Innovation Solution

The method involves determining package assembly yields across different die pools with varying performance criteria, generating a final assembly sequence to combine dies in a way that maximizes yield, and using a tool with an input station, output station, die handler, and controller to selectively assemble dies based on performance criteria, preferentially using dies with higher performance first.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If conventional fabrication techniques match dies from bins with highest and lowest performance, then assembly process is simple, but product yield is unsatisfactory

Engineering Contradiction:
Improveproduct yieldVSAvoidassembly process complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by pre-calculating and storing optimal die matching sequences in a look-up table before actual package assembly. The system determines the best way to combine dies from different performance bins in advance, based on target package performance requirements. This pre-computed assembly sequence guide enables high yield without complex real-time decision-making during assembly, resolving the contradiction between yield improvement and process complexity.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system applies self-service by using the look-up table to automatically determine optimal die combinations without requiring complex real-time calculations or human intervention. The pre-stored assembly sequences self-guide the assembly process, allowing the system to achieve high yield through simple automated execution of pre-determined plans, rather than through complex ongoing control mechanisms.

Inventive Principle:
Principle #25Self-service

2Ease of manufacture

If conventional techniques use simple die matching from performance bins, then fabrication process is easy, but many dies remain unmatched increasing costs

Engineering Contradiction:
Improvefabrication easeVSAvoidunmatched dies
Core Design Contradiction:
Ease of manufactureVSLoss of substance

Solution Approach 1:

The patent calculates and stores optimal die matching strategies in advance in a look-up table, determining the best combinations of dies from different performance bins to achieve target package specifications. This preliminary computation identifies all viable matching options before assembly begins, ensuring maximum die utilization while maintaining simple automated execution during actual fabrication.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system changes the approach from simple binary matching (highest with lowest) to multi-parameter optimization considering target package performance requirements, die performance characteristics, and bin configurations. By varying the matching parameters based on stored look-up table data, the system achieves better die utilization without significantly complicating the fabrication process.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If conventional methods match dies without optimization, then assembly is straightforward, but fabrication costs increase due to waste

Engineering Contradiction:
Improvedie utilizationVSAvoidyield optimization complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent performs yield optimization calculations in advance, storing optimal assembly sequences in a look-up table that maps die bin configurations to best matching strategies. This pre-computation handles the complex optimization mathematics before production, allowing straightforward automated execution during assembly while achieving superior die utilization and yield compared to conventional real-time or heuristic approaches.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10707138B1High yield package assembly technique
Publication Date: 2020.07.07 XILINX INC
  • US10707138B1 patent drawing
  • US10707138B1 patent drawing
  • US10707138B1 patent drawing

AI summary

An integrated circuit (IC) chip package assembly apparatus and techniques for assembling IC chip packages are described. For example, a techniques for fabricating an IC package include (A) determining a first package assembly yield (PAY) across a first die pool comprising a first plurality of dies having a performance criteria within a first predefined range; (B) determining a second PAY across a second die pool comprising a second plurality of dies having a performance criteria within a second predefined range of performance criteria that is different than the first predefined range of performance criteria, the second plurality of dies comprising a portion of the first plurality of dies; and (C) generating a final assembly sequence in response to analyzing the first and second PAYs, the final assembly sequence comprising rules for combining dies in accordance with obtaining a higher of the first PAY and the second PAY.