IC Packaging with Adhesive Tape Singulation and Step Encapsulation

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Solution Overview

Problem

Multi-chip and chip stack packages face reliability and yield issues due to the failure of one chip causing the entire package to fail, leading to reduced productivity and increased costs in assembly processes.

Innovation Solution

The integrated circuit packaging system involves a package substrate with a substrate base and stack side, mounting an integrated circuit, attaching stack and external connectors, forming an encapsulation with a step portion to expose the stack connector, and using an adhesive tape to reduce manufacturing processes and costs by simplifying the singulation and tape removal phases.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If multiple chips are combined in a single package to increase memory density and multi-functionality, then the package footprint is reduced, but the reliability and yield decrease because one failing chip causes the entire package to fail

Engineering Contradiction:
Improvepackage footprintVSAvoidpackage yield
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The substrate is divided into multiple isolation regions, with each region containing a specific chip and its associated test structures. This segmentation allows independent testing and evaluation of each chip before final package assembly, so that a failure in one chip does not necessarily condemn the entire package. The isolation regions act as independent test chambers that can be individually assessed.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Test structures are formed in the isolation regions before the chips are mounted and before the final encapsulation is applied. This preliminary testing allows identification of defective chips or interconnect issues early in the manufacturing process, enabling selective rework or replacement of only the problematic components rather than discarding the entire package.

Inventive Principle:
Principle #10Preliminary action

2Adaptability or versatility

If traditional multi-chip packaging processes are used to achieve high integration, then device functionality is improved, but manufacturing complexity and cost increase

Engineering Contradiction:
Improvedevice functionalityVSAvoidmanufacturing process complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The test structure formation process is merged with the existing chip mounting and encapsulation processes. The same encapsulation material and curing conditions used for protecting the chips also protect the test structures. This integration eliminates the need for separate test structure fabrication steps, reducing manufacturing complexity while maintaining the ability to perform preliminary testing.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The isolation regions serve multiple functions: they provide physical isolation for individual chip testing, they contain test structures that enable preliminary evaluation, and they maintain compatibility with standard encapsulation processes. This multi-functionality reduces the need for specialized equipment or processes while achieving the goal of improved reliability through preliminary testing.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If additional test structures and isolation regions are added to improve reliability, then yield is improved, but manufacturing steps and materials increase

Engineering Contradiction:
Improvepackage yieldVSAvoidmanufacturing simplicity
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The test structures are formed using the same encapsulation material and curing process that is already required for protecting the chips. This merging of functions means that the additional reliability features do not require separate manufacturing steps, materials, or equipment beyond what is already needed for standard package encapsulation.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS8372695B2Integrated circuit packaging system with stack interconnect and method of manufacture thereof
Publication Date: 2013.02.12 STATS CHIPPAC MANAGEMENT PTE LTD
  • US8372695B2 patent drawing
  • US8372695B2 patent drawing
  • US8372695B2 patent drawing

AI summary

A method of manufacture of an integrated circuit packaging system includes: providing a package substrate having a substrate base side and a substrate stack side; mounting an integrated circuit over the substrate stack side; attaching a stack connector to the substrate stack side; forming an encapsulation over the stack connector and the integrated circuit; attaching an external connector to the substrate base side; attaching an adhesive tape to the external connector having spacing between the adhesive tape and the substrate base side; cutting a step portion in the encapsulation to expose the stack connector; cutting a singulation kerf in the package substrate having exit damage on the substrate base side; and removing the adhesive tape.