IC Packaging Bond Pad Staggered Configuration

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The challenge in integrated circuit packaging is to achieve high I/O density and reliability while navigating tight geometry constraints and the limitations of conventional wire bonding processes, which struggle with bond strength and deformation on small bond pad areas.

Innovation Solution

The solution involves a semiconductor packaging system with a core region and adjacent inner and outer bond pads, where the inner probe pad is further from the core region than the inner core pad, and the outer probe pad is closer to the core region than the outer core pad, aligned parallel to the core side, allowing for a staggered configuration that enhances reliability and reduces pad pitch.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If conventional wire bonding process is used with small bond pad area, then I/O density can be increased, but bond strength and reliability deteriorate due to bond deformation

Engineering Contradiction:
ImproveI/O densityVSAvoidbond strength
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The bond pad is segmented into two distinct regions: a core pad region for wire bonding and a probe pad region for testing. This segmentation allows the core pad to be optimized for bonding reliability with sufficient area, while the probe pad handles testing functions, thereby resolving the contradiction between high I/O density and bond strength.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the bond pad structure are assigned different functions and properties. The core pad region provides mechanical strength and electrical connection for wire bonding, while the probe pad region is optimized for probe card contact and testing. This local differentiation enables both high density and reliability to be achieved simultaneously.

Inventive Principle:
Principle #3Local quality

2Quantity of substance

If bond pad area is reduced to increase I/O density, then more I/O can be packed, but manufacturing precision and reliability deteriorate

Engineering Contradiction:
ImproveI/O densityVSAvoidbond deformation control
Core Design Contradiction:
Quantity of substanceVSManufacturing precision

Solution Approach 1:

By segmenting the pad structure into core pad and probe pad regions, the design allows the core pad to maintain sufficient area for reliable wire bonding while the overall pad footprint is optimized for high density. The probe pad region can be positioned to avoid interference with bonding processes, thereby maintaining manufacturing precision.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The probe pad is positioned in a different spatial relationship relative to the core pad, creating a two-dimensional arrangement that optimizes both bonding and testing functions. This dimensional arrangement allows for finer pitch designs without compromising bond deformation control.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Device complexity

If probe pad and core pad are in traditional alignment, then structure is simple, but wirebond connections are vulnerable to damage

Engineering Contradiction:
Improvepad structure simplicityVSAvoidwirebond connection integrity
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The probe pad and core pad are positioned in an asymmetric staggered arrangement rather than traditional aligned configurations. This asymmetric positioning protects the wirebond connections from probe card contact damage while maintaining structural simplicity and enabling finer pitch designs.

Inventive Principle:
Principle #4Asymmetry

Data Source

PatentUS8603909B2Integrated circuit packaging system with core region and bond pad and method of manufacture thereof
Publication Date: 2013.12.10 GLOBALFOUNDRIES SINGAPORE PTE LTD
  • US8603909B2 patent drawing
  • US8603909B2 patent drawing
  • US8603909B2 patent drawing

AI summary

A method of manufacture of an integrated circuit packaging system includes: providing a semiconductor substrate; forming a core region on the semiconductor substrate with the core region having a core side; forming an inner bond pad on the semiconductor substrate with the inner bond pad having an inner core pad and an inner probe pad with the inner probe pad further from the core region than the inner core pad; and forming an outer bond pad on the semiconductor substrate and adjacent the inner bond pad with the outer bond pad having an outer core pad and an outer probe pad with the outer probe pad closer to the core region than the outer core pad, and the inner probe pad and the outer probe pad aligned parallel to the core side.