IC Packaging with Exposed Interconnects to Eliminate Bridging
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Solution Overview
Problem
The electronic industry faces challenges in creating smaller, more integrated, and cost-effective integrated circuit packaging systems that meet the demands for increased functionality and miniaturization, while avoiding issues like solder ball bridging and improving reliability.
Innovation Solution
The proposed solution involves a method of integrated circuit packaging that includes a first substrate with a component and a stack substrate having inner and outer pads, where a first exposed interconnect is partially exposed from a first encapsulation, and a second exposed interconnect is mounted on the inner pad, eliminating solder ball bridging and enhancing reliability through improved encapsulation and interconnect design.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional solder ball interconnect methods are used, then electrical connection is achieved, but solder ball bridging occurs and reliability decreases
Solution Approach 1:
The patent extracts the harmful solder ball material and replaces it with exposed interconnect structures that extend through the encapsulation. The interconnects are directly exposed at the encapsulation surface, eliminating the solder ball bridging problem while maintaining electrical connection functionality.
Solution Approach 2:
The encapsulation material serves as an intermediary that selectively exposes interconnects at its surface. This intermediary structure provides mechanical support and protection while enabling controlled electrical connections without using traditional solder balls that cause bridging.
2Volume of moving object
If miniaturization is pursued to reduce product size, then smaller integrated circuits are achieved, but manufacturing complexity increases
Solution Approach 1:
The patent merges the encapsulation function with the interconnect exposure function into a single integrated structure. The encapsulation material is formed to simultaneously protect internal components and selectively expose interconnects at its surface, reducing the need for separate interconnect structures and simplifying the overall packaging design.
Solution Approach 2:
The patent transitions from traditional planar packaging to a three-dimensional stacked architecture with vertical interconnects. The interconnects extend vertically through the encapsulation, utilizing the vertical dimension to achieve higher density and smaller footprint while maintaining manufacturing feasibility.
3Adaptability or versatility
If increased integration is implemented to enhance functionality, then more circuits are packed, but manufacturing precision requirements increase
Solution Approach 1:
The patent incorporates interconnects into the stack substrate before final encapsulation. This preliminary placement allows for controlled formation of interconnect positions during substrate fabrication, and the subsequent encapsulation process automatically maintains these positions without requiring high-precision alignment steps, thereby reducing manufacturing precision requirements.
Data Source
AI summary
A method of manufacture of an integrated circuit packaging system includes: providing a first substrate; mounting a component over the first substrate; mounting a stack substrate over the component, the stack substrate having an inner pad and an outer pad connected to the first substrate; mounting a first exposed interconnect on the outer pad; forming a first encapsulation over the stack substrate, the first exposed interconnect partially exposed and the inner pad partially exposed in a recess of the first encapsulation; and mounting a second exposed interconnect on the inner pad.