IC Pad Failure Detection via TDC Delay Measurement
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Solution Overview
Problem
Existing integrated circuits (ICs) lack effective methods for detecting intermittent or instantaneous disconnections of IC pads, which can lead to signal integrity loss and complete system failure.
Innovation Solution
A semiconductor IC with a time-to-digital converter (TDC) circuit that measures input-to-output delays for IC pads, converting these delays into digital values that reflect pad connection impedance. A digital comparator circuit compares these values to determine if a threshold is exceeded, triggering a notification for potential or actual pad failures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional IC design without pad failure detection is used, then device complexity is reduced, but reliability deteriorates due to undetected pad disconnections
Solution Approach 1:
The TDC circuit is integrated within the I/O buffer structure, merging the time measurement function with the existing I/O pad architecture. The delay measurement functionality is combined with the input/output buffer, eliminating the need for separate external detection circuits and reducing overall device complexity while maintaining reliability.
Solution Approach 2:
The I/O buffer performs self-diagnosis by measuring its own input-to-output delay using the integrated TDC. The buffer monitors its own pad connection status through the delay measurement mechanism, enabling autonomous failure detection without requiring external testing equipment or additional control circuits.
2Reliability
If continuous monitoring of pad connections is implemented, then reliability is improved, but use of energy increases due to continuous operation of detection circuits
Solution Approach 1:
The delay measurement operates continuously during normal I/O buffer operation, utilizing the inherent signal transitions during regular data transmission. The TDC measures delay during each valid data transfer cycle, converting the periodic I/O operation into continuous monitoring without requiring separate power-consuming measurement cycles.
3Measurement precision
If detailed delay measurements are performed for each pad, then measurement precision is improved, but device complexity increases due to multiple TDC circuits
Solution Approach 1:
The I/O buffer structure serves multiple functions: data transmission, time delay measurement, and pad connection status monitoring. The same buffer circuitry that handles data I/O also performs the measurement functions, eliminating the need for dedicated separate measurement circuits for each pad and reducing overall device complexity.
4Ease of operation
If threshold-based failure detection is used, then ease of operation is improved, but measurement precision is reduced compared to continuous monitoring
Solution Approach 1:
The system continuously compares measured delay values against reference thresholds and provides feedback when deviations indicate potential failures. The digital comparator circuit monitors delay variations in real-time and triggers notifications when threshold violations occur, enabling simple threshold-based operation while maintaining continuous measurement capability for precision.
Data Source
AI summary
A semiconductor integrated circuit (IC) comprising a time-to-digital converter (TDC) configured to measure an input-to-output delay of an I/O buffer of a pad the IC, the measured delay reflecting a connection impedance of the pad. A circuit in the IC, or a computer in communication with the IC, determines electrical connection integrity of the pad based on the measured delay of the I/O buffer.