Integrated Circuit Physical Parameter Estimation at RTL
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Solution Overview
Problem
Current methods fail to accurately estimate physical parameters of paths in integrated circuits at higher levels of abstraction, particularly when physical components' parameters vary over time, leading to potential logical errors due to signal propagation time discrepancies.
Innovation Solution
A method that analyzes integrated circuits by extracting and labeling physical components and modules, determining their physical parameters, and constructing associative arrays to assign these parameters, allowing for the estimation of physical parameters of both represented and non-represented components across multiple modules.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If physical parameters are estimated using prior characterization techniques at RTL level, then productivity is improved by enabling early analysis, but measurement precision deteriorates when physical parameters vary over time due to aging or temperature effects
Solution Approach 1:
The patent performs preliminary characterization of physical parameters at gate level before RTL simulation, storing these parameters in lookup tables. During RTL analysis, the system retrieves pre-computed parameters rather than calculating them in real-time, enabling early productivity benefits while maintaining accuracy through pre-characterized data that accounts for aging and temperature variations.
Solution Approach 2:
The patent creates a mapping between RTL-level abstract components and their corresponding gate-level physical implementations. By copying physical parameter data from the detailed gate level to the abstract RTL level through this mapping, the system enables accurate parameter estimation at higher abstraction levels without sacrificing measurement precision.
2Measurement precision
If path analysis is performed at gate level with full physical component detail, then measurement precision is improved, but device complexity increases due to the large number of physical components to be analyzed
Solution Approach 1:
The patent segments the analysis into two distinct levels: gate-level physical characterization and RTL-level logical analysis. By separating the detailed physical component analysis from the higher-level behavioral analysis, the system maintains measurement precision for physical parameters while reducing the complexity of components that need to be analyzed at each stage.
Solution Approach 2:
The patent introduces an additional dimension of abstraction by mapping physical parameters from gate level to RTL level. This dimensional transformation allows the system to work with aggregated parameter data at higher levels rather than individual physical components, reducing complexity while preserving measurement accuracy through the mapping relationship.
Data Source
AI summary
A method for analyzing the behavior of an integrated circuit implemented by computer comprises: the extraction of the names of the physical components described at the RTL (or higher) level, therefore of the physical components represented, as well as the names of the modules; the extraction of the names of the physical components of a path of the circuit at the logic gate level; the labeling of the names of the physical components of the paths with the names of the known physical components or the names of the parent modules; the extraction of the physical parameters of results of simulation/analysis of the circuit at the higher level. The output is composed of associative arrays containing the physical parameters of the physical components described at the envisaged level; the assignment of the physical parameters determined in the previous step, to the labeled components of the paths.