Integrated Circuit Path Grouping for Systematic Defect Correction
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Solution Overview
Problem
In the IC design process, identifying and correcting systematic defects in integrated circuit layouts is challenging due to the complexity of semiconductor devices and the hierarchical nature of IC layout diagrams.
Innovation Solution
The approach involves grouping paths in an IC layout diagram by dominant features such as timing, logical, or physical characteristics, testing individual paths, and applying correction strategies based on the identified dominant features to fix systematic defects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If paths are tested individually without grouping, then each path can be verified, but the complexity of testing increases and systematic defects cannot be efficiently identified
Solution Approach 1:
The patent segments paths into groups based on dominant features (timing, logical, physical characteristics). Each group shares a common dominant feature, allowing systematic testing where one test pattern can identify defects affecting multiple paths with the same feature. This segmentation reduces testing complexity while maintaining comprehensive defect detection capability.
2Reliability
If comprehensive testing of all paths is performed, then defect detection coverage is maximized, but the time and resources required increase significantly
Solution Approach 1:
The patent creates universal test patterns for each group of paths sharing a dominant feature. A single test pattern generated for a group can verify multiple individual paths simultaneously, providing multi-functional testing capability. This universal approach maintains comprehensive defect detection coverage while significantly reducing the total number of tests required compared to individual path testing.
3Reliability
If correction strategies are applied without identifying dominant features, then some defects may be fixed, but systematic defects affecting multiple paths cannot be efficiently corrected
Solution Approach 1:
The patent implements a feedback mechanism where test results from grouped paths provide information about the dominant feature status. When systematic defects are detected in a group, correction strategies are applied specifically targeting that dominant feature. The feedback from corrected paths confirms whether the systematic defect has been resolved, enabling efficient propagation of corrections across multiple paths with the same feature characteristic.
Data Source
AI summary
A method includes creating a plurality of groups of paths from a plurality of paths in an integrated circuit (IC) layout diagram. Each group has a unique dominant feature among a plurality of features of the plurality of paths. The method further includes testing a path in a group and, when the path fails, modifying at least one of the IC layout diagram, at least a portion of at least one library having cells included in the IC layout diagram, or a manufacturing process for manufacturing an IC corresponding to the IC layout diagram. The plurality of features includes a numerical feature having a numerical value, and a categorical feature having a non-numerical value. The non-numerical value is converted into a converted numerical value. The plurality of groups is created based on the numerical value of the numerical feature, and the converted numerical value of the categorical feature.