IC Pin Placement Optimizing Board Layout via Proximity Cost
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Solution Overview
Problem
Automated pin placement for integrated circuit (IC) design tools does not consider external system design factors, leading to complex circuit board layouts due to random distribution of input/output (I/O) pins across package pins, making manual mapping tedious and inefficient.
Innovation Solution
A computer-implemented method that calculates a cost function based on proximity and available package pins to strategically assign I/O pins to banks, ensuring pins of the same interface or bus are mapped to proximate package pins, thereby simplifying circuit board design.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If automated pin placement is used, then productivity is improved, but device complexity increases due to random distribution of I/O pins
Solution Approach 1:
The patent changes the optimization parameter from purely internal IC constraints to include external circuit board proximity metrics. The cost function is modified to incorporate distance measurements between package pins and external circuit board locations, transforming the pin placement problem from an internal routing issue to an externally-aware system design problem.
Solution Approach 2:
The patent introduces a cost function as an intermediary that bridges the gap between automated pin placement and external circuit board design considerations. This cost function acts as a mediator that translates external proximity requirements into internal placement decisions, allowing automated tools to optimize for both IC internal constraints and external system requirements simultaneously.
2Ease of operation
If manual pin mapping is used, then ease of operation is improved for complex constraints, but productivity decreases due to tedious process
Solution Approach 1:
The patent enables the automated pin placement tool to serve itself by incorporating external circuit board proximity considerations directly into its cost function. The tool automatically evaluates and optimizes for both internal IC constraints and external system requirements without requiring manual intervention, allowing the system to handle complex constraints autonomously while maintaining high productivity.
3Adaptability or versatility
If I/O pins are distributed randomly, then adaptability is improved for different I/O standards, but ease of operation worsens for circuit board design
Solution Approach 1:
The patent applies local quality by optimizing the spatial distribution of I/O pins based on their specific external circuit board locations. Instead of uniform or random distribution, each bank of package pins is strategically placed according to its proximity to external circuit board components, creating locally optimized placements that simplify external routing while maintaining overall system adaptability.
Data Source
AI summary
A computer-implemented method of placing input/output (I/O) pins of a circuit design for an integrated circuit (IC) can include selecting a bus from a plurality of buses, where the selected bus includes a plurality of I/O pins and is part of an interface, and, for each of a plurality of banks of the IC, determining a cost of assigning the selected bus to the bank according, at least in part, to a measure of proximity of the bank to another bank including a bus of the interface. The method can include selecting an available bank having a lowest cost, assigning at least one of the plurality of I/O pins of the selected bus not assigned to a bank of the IC to the selected bank, and outputting a circuit design including an association of I/O pin(s) of the selected bus to the selected bank.