Integrated Circuit Power Calculation via Cell Segmentation
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Solution Overview
Problem
Conventional methods for calculating integrated circuit power consumption are inaccurate due to increased complexity with growing cell scale, requiring collective simulation of transistors, leading to lengthy simulation times and inability to properly account for power consumption variations in large-scale circuits and cells with many internal states.
Innovation Solution
An integrated circuit power consumption calculating apparatus that partitions transistors into circuit components based on connection information, performs logic simulation for each component, and calculates power consumption using inter-cell wiring information to accurately determine signal transitions and load capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If collective simulation of transistors is performed for the entire cell, then power consumption calculation accuracy is maintained, but simulation time becomes excessively long and calculation becomes impractical
Solution Approach 1:
The patent segments a large-scale cell into multiple circuit blocks, each containing a subset of transistors. Instead of simulating all transistors collectively, the simulation divides and conquers by processing each block separately. This segmentation maintains calculation accuracy for each block while dramatically reducing overall simulation time, making power consumption calculation practical for large-scale cells with thousands of transistors.
2Adaptability or versatility
If the cell scale increases with more transistors, then circuit functionality is enhanced, but power consumption calculation accuracy degrades due to inability to simulate all states
Solution Approach 1:
The patent applies segmentation by dividing large-scale cells into smaller circuit blocks that can be individually analyzed. Each block's power consumption is calculated separately with sufficient accuracy, then results are aggregated to obtain the total cell power consumption. This approach maintains measurement precision despite increasing cell scale and transistor count.
Solution Approach 2:
The patent performs partial simulation by selecting representative input patterns and simulating only the necessary transistor states within each circuit block. Rather than exhaustively simulating all possible transistor states, it uses partial action on carefully selected patterns to achieve adequate power consumption accuracy while reducing computational burden.
3Measurement precision
If circuit simulation is performed for each transition state, then accurate power consumption is obtained, but the process becomes impossible for cells with many transistors due to excessive time requirements
Solution Approach 1:
The patent segments the circuit simulation process into multiple circuit blocks, allowing parallel or sequential processing of smaller subsets. This segmentation enables the system to handle cells with many transistors by breaking down the intractable full-circuit simulation into manageable block-level simulations, thereby improving calculation efficiency while maintaining power consumption accuracy.
Solution Approach 2:
The patent employs partial action by simulating only representative transition states rather than all possible states. By selecting input patterns that adequately represent the circuit's operational diversity, it achieves sufficient power consumption accuracy without the prohibitive time cost of exhaustive simulation, thus improving productivity.
Data Source
AI summary
An integrated circuit power consumption calculating apparatus obtains power consumption of an integrated circuit by outputting circuit component transistor connection information of each of circuit components after setting a group of transistors connected via a source terminal/drain terminal of a transistor within each cell of an integrated circuit, by outputting circuit component logic model information after extracting a logic for each of the circuit components from the circuit component transistor connection information information, by obtaining power information (circuit component power information) of each signal transition state of an input/output terminal for each of the circuit components based on the circuit component transistor connection information information, by generating signal terminal transition information with a logic simulation performed for each of the circuit components of the integrated circuit, and by obtaining power consumption in a signal transition of an input/output terminal of each of the circuit components.