Early Power Estimation for Integrated Circuit Designs
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Solution Overview
Problem
Current methods for estimating power consumption of integrated circuit designs are time-consuming and inaccurate at the register-transfer-level (RTL) stage, leading to lengthy design times and potential commercial viability issues due to excessive power dissipation.
Innovation Solution
A method that partitions the integrated circuit netlist into equal parts, synthesizes a subset to determine an average power correction ratio, and uses this ratio to correct less-accurate estimates for the remaining gates, allowing for early and reasonably accurate power consumption estimation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If full synthesis is performed to obtain accurate power consumption calculation, then measurement precision is improved, but loss of time increases
Solution Approach 1:
The circuit netlist is divided into multiple partitions, and only a selected subset of these partitions is synthesized to determine power correction ratios. This segmentation allows the system to obtain power estimation data from a representative sample without performing full circuit synthesis, thereby reducing time while maintaining reasonable accuracy through statistical extrapolation to the entire circuit.
Solution Approach 2:
Instead of performing complete synthesis of the entire circuit, the method performs partial synthesis on only a subset of partitions (e.g., 10-30% of total partitions). This partial action is sufficient to capture the power consumption characteristics needed to compute correction ratios, which are then applied to estimate power for the remaining unsynthesized partitions, achieving acceptable accuracy with reduced computational effort.
2Loss of time
If early power estimation is performed at RTL level, then loss of time is reduced, but measurement precision deteriorates
Solution Approach 1:
The method introduces an intermediary correction mechanism using power correction ratios derived from synthesized partitions. These ratios act as mediators that bridge the gap between rough RTL-level power estimates and more accurate post-synthesis power calculations. By applying these correction ratios to RTL estimates, the system achieves improved accuracy without requiring complete synthesis before estimation.
Solution Approach 2:
The system performs preliminary synthesis on a subset of partitions to establish power correction ratios before final power estimation. This preliminary action on representative samples enables the system to capture synthesis-induced power variations and use this information to correct subsequent RTL-level estimates, improving accuracy while maintaining early estimation capability.
3Productivity
If subset of partitions is synthesized to determine power correction ratios, then productivity is improved, but device complexity increases
Solution Approach 1:
The method creates simplified copies or representations of power consumption characteristics by computing correction ratios from synthesized partitions. These ratio copies capture the essential power behavior and can be applied across all partitions without requiring detailed analysis of each individual partition, thereby simplifying the overall process while maintaining productivity.
Data Source
AI summary
In one embodiment of the invention, a method of designing integrated circuits is disclosed. The method includes determining a power correction factor for a subset of partitions of circuits in an integrated circuit design; determining a gross power consumption estimate for all partitions of circuits in the integrated circuit design without synthesizing the entire integrated circuit design; and improving the accuracy of the gross power consumption estimate using the power correction factor to generate a reasonably accurate power consumption estimate for the entire integrated circuit design prior to substantially full circuit synthesis thereof.