Integrated Circuit Power Distribution via Internal Conductive Wires
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Solution Overview
Problem
The distribution of power supply potentials in integrated circuits is inefficient due to parasitic resistances in external connection tracks, requiring multiple terminals that increase package bulk and complexity.
Innovation Solution
A configuration where power supply potentials are distributed from the center of the integrated circuit chip using a reduced number of terminals, with conductive pads and wires connecting them to maintain homogeneous potential distribution, reducing the need for peripheral terminals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If multiple peripheral terminals are used to distribute power supply potentials, then potential distribution homogeneity is improved, but package bulk increases
Solution Approach 1:
The patent transitions from a two-dimensional peripheral arrangement of power supply terminals to a three-dimensional configuration by routing conductive wires through the interior of the package. This allows terminals to be positioned at corners of the package while power distribution occurs through the package volume, reducing the need for extensive peripheral terminal arrangements and thereby reducing package bulk while maintaining potential distribution homogeneity.
Solution Approach 2:
The patent nests conductive wires within the package interior, embedding the power distribution pathway inside the package structure rather than arranging terminals along the periphery. This nesting approach allows efficient power distribution through the package volume without increasing the external package dimensions, thus reducing package bulk while maintaining potential distribution homogeneity.
2Manufacturing precision
If multiple peripheral terminals are used to distribute power supply potentials, then potential distribution homogeneity is improved, but device complexity increases
Solution Approach 1:
The patent simplifies device complexity by moving power distribution from a peripheral two-dimensional terminal arrangement to a three-dimensional interior routing system. This dimensional change reduces the number of peripheral terminals needed and simplifies the overall package structure while maintaining effective power distribution homogeneity.
Solution Approach 2:
The patent reduces device complexity by nesting conductive wires within the package interior, eliminating the need for complex peripheral terminal arrangements. This nested configuration simplifies the package structure and reduces the number of external connections required while maintaining potential distribution homogeneity.
3Volume of stationary object
If fewer terminals are used, then package bulk is reduced, but potential distribution homogeneity deteriorates
Solution Approach 1:
The patent overcomes the limitation of fewer terminals by transitioning to three-dimensional interior routing. Conductive wires are positioned at strategic locations within the package interior, allowing effective power distribution with fewer terminals while maintaining potential distribution homogeneity and reducing package bulk.
Solution Approach 2:
The patent enables fewer terminals to achieve effective power distribution by nesting conductive wires within the package interior. This nested configuration allows the wires to reach multiple locations throughout the package, maintaining potential distribution homogeneity with fewer external terminals and thereby reducing package bulk.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the number of connection terminals while maintaining homogeneous potential distribution, minimizing package size and bulk, and allowing for more efficient power supply potential distribution.
Implementation Method 1
conductive wires connecting two by two a first pad and a second pad
Implementation Method 2
the tracks conveying this static potential from the external terminal all the way to the elements using them have parasitic resistances
Data Source
AI summary
An integrated circuit includes peripheral conductive pads interconnected by a peripheral conductive track within an integrated circuit chip. The integrated circuit chip further includes internal conductive pads interconnected by an internal conductive track within the integrated circuit chip. A conductive bonding wire external to the integrated circuit chip connects the one peripheral conductive pad to one internal conductive pad. A package encapsulates the integrated circuit chip and the conductive bonding wire.