Dedicated LMTT Bus for Fast IC Power Limit Broadcasting
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Solution Overview
Problem
Conventional power management systems in processor-based systems face challenges in efficiently managing power consumption and throttling due to delays in communication and congestion on the on-chip communications network, leading to issues like voltage droop, heat generation, and excess power consumption, especially in large IC chips with integrated processing devices.
Innovation Solution
A dedicated Limit Management Throughput Throttle (LMTT) bus is introduced to directly broadcast power limiting management responses to activity management circuits, separate from the conventional communications network, enabling faster and more efficient power throttling by local area management circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If power management responses are transmitted through the conventional on-chip communications network, then the system can maintain a unified communication infrastructure, but transmission delays and network congestion occur leading to voltage droop and heat generation
Solution Approach 1:
The patent segments the communication infrastructure by creating a dedicated LMTT bus separate from the conventional on-chip network. This segmentation allows power management responses to travel through a specialized low-latency path while general data traffic uses the conventional network, resolving the contradiction between unified infrastructure and fast response times.
Solution Approach 2:
The LMTT bus acts as an intermediary communication channel between the power management unit and processing devices. This intermediary structure provides a dedicated pathway for time-critical power management signals, eliminating delays caused by sharing the conventional network while maintaining overall system integration.
2Productivity
If power management responses are transmitted through the conventional on-chip communications network, then the system structure remains simple, but network congestion occurs reducing power throttling efficiency
Solution Approach 1:
The communication infrastructure is segmented into two distinct channels: the conventional on-chip network for general data traffic and the dedicated LMTT bus for power management responses. This segmentation improves power throttling efficiency by eliminating network congestion while the added complexity is localized to the specialized bus structure.
Solution Approach 2:
The system dynamically routes different types of traffic through appropriate channels: time-critical power management responses use the dedicated LMTT bus for immediate delivery, while non-time-critical data traffic uses the conventional network, optimizing overall system productivity.
3Speed
If a dedicated LMTT bus is introduced for broadcasting power limiting management responses, then transmission latency is reduced and power throttling efficiency is improved, but the communication infrastructure complexity increases
Solution Approach 1:
The LMTT bus provides locally optimized communication quality specifically for power management responses, with dedicated wiring and direct routing to processing devices. This local quality improvement achieves fast response speeds while the overall system complexity increases only in the specific area where high-speed communication is critical.
Solution Approach 2:
The communication system becomes dynamic with multiple routing options: the LMTT bus provides high-speed direct routing for power management traffic, while the conventional network handles other traffic. This dynamic architecture achieves superior speed for critical functions while managing overall complexity through specialized optimization.
Data Source
AI summary
Broadcasting power limiting management responses in a processor-based system in an integrated circuit (IC) chip is disclosed herein. In one aspect, an IC chip comprises a processor-based system that includes a power estimation and limiting (PEL) circuit, a Limit Management Throughput Throttle (LMTT) source circuit, a plurality of activity management (AM) circuits, and an LMTT bus communicatively coupling the LMTT source circuit with each AM circuit of the plurality of AM circuits. The LMTT source circuit receives a power limiting management response from a PEL circuit via a communications network of the processor-based system, and generates an LMTT command based on the power limiting management response. The LMTT source circuit broadcasts the LMTT command to each AM circuit of the plurality of AM circuits via the LMTT bus.