Integrated Circuit Power Line Routing via Substrate Via
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The large parasitic capacitance on data lines in integrated circuits, such as those used in mobile phones, causes signal delay due to the intersection of data and power lines.
Innovation Solution
The integrated circuit design includes a substrate with a data distributor and data driver, featuring a power line trace gap that allows the first power line to pass through without bypassing the data distributor, reducing the intersection length of the first data line and power line, thereby minimizing parasitic capacitance and signal delay.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by stationary object
If the power line bypasses the data distributor to extend to other areas, then the power line can supply power to devices in other areas, but the parasitic capacitance across the data line increases causing signal delay
Solution Approach 1:
The power line is routed through the vertical dimension by passing through the substrate via a via structure, rather than routing it horizontally on the same layer as data lines. This three-dimensional routing approach allows the power line to penetrate the data distributor layer without creating large planar intersections, thereby reducing parasitic capacitance while maintaining power supply capability to multiple areas.
Solution Approach 2:
A via structure serves as an intermediary element that enables the power line to transition between different substrate layers. This via acts as a conduit that allows vertical power transmission through the data distributor without requiring horizontal bypass routing, thus eliminating the parasitic capacitance issue while maintaining power distribution functionality.
2Ease of operation
If the power line intersects with data lines to bypass the data distributor, then the power line can reach other areas, but the intersection area increases parasitic capacitance blocking data signal transmission
Solution Approach 1:
The power line routing problem is solved by transitioning from two-dimensional planar routing to three-dimensional vertical routing. The power line passes through the substrate thickness direction via a via, eliminating large-area planar intersections with data lines. This dimensional change maintains routing flexibility while preserving signal transmission quality by minimizing parasitic capacitance.
Solution Approach 2:
The power line routing is segmented into multiple sections: a first section on the first substrate layer, a via structure penetrating through the substrate, and a second section on the second substrate layer. This segmentation allows the power line to avoid continuous horizontal intersection with data lines, reducing parasitic capacitance accumulation while maintaining operational flexibility.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design effectively reduces parasitic capacitance and corresponding signal delay, improving data transmission efficiency by minimizing the intersection area of data and power lines.
Implementation Method 1
the parasitic capacitance across the data line 5 to be large, so that the transmission of the data signal can be blocked
Data Source
AI summary
An integrated circuit, a mobile phone and a display are provided with the integrated circuit. The integrated circuit includes a substrate, a data distributor and a data driver distributed on the substrate. A power line trace gap is provided within the data distributor; a first data line connected to the data driver and to the data distributor; and a first power line connected to the data driver and passing through the power line trace gap.