IC Power Distribution via Partitioned LDO Regulators

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Solution Overview

Problem

In integrated circuit (IC) design, existing power distribution methods often result in inefficient power supply arrangements, leading to suboptimal operation and increased power consumption due to the use of a single power group for all standard cells within a macro block, which can cause congestion and inefficiencies in chip layout.

Innovation Solution

The method involves dividing the macro block into partitions based on IR simulation results and inserting low drop out (LDO) regulators into each partition, providing independent supply voltages and using power isolation cells to separate power domains, allowing for flexible power management and reduced power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a single power group is used for all standard cells within a macro block, then the power distribution structure is simple, but power consumption efficiency deteriorates and congestion occurs in chip layout

Engineering Contradiction:
Improvepower distribution structureVSAvoidpower consumption efficiency
Core Design Contradiction:
Device complexityVSLoss of energy

Solution Approach 1:

The macro block is divided into multiple partitions based on IR simulation results, with each partition receiving independent power supply through dedicated LDO regulators. This segmentation allows different power domains to be optimized independently, improving power consumption efficiency while managing complexity through systematic division.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Each partition is assigned its own LDO regulator to provide locally optimized power supply. This enables different power domains within the macro block to have tailored power characteristics suitable for their specific functional requirements, thereby improving overall power efficiency.

Inventive Principle:
Principle #3Local quality

2Device complexity

If a single power group is used for all standard cells within a macro block, then the power distribution structure is simple, but congestion occurs in chip layout

Engineering Contradiction:
Improvepower distribution structureVSAvoidchip layout efficiency
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

By dividing the macro block into multiple partitions with independent power domains, the power distribution network is segmented into smaller, more manageable units. This reduces congestion in the chip layout by distributing power routing across multiple localized paths rather than requiring a single extensive power network.

Inventive Principle:
Principle #1Segmentation

3Loss of energy

If LDO regulators are inserted into each partition, then power consumption efficiency is improved, but device complexity increases

Engineering Contradiction:
Improvepower consumption efficiencyVSAvoidpower distribution structure
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

The macro block is divided into multiple partitions based on IR simulation results, with each partition receiving independent power supply through dedicated LDO regulators. This segmentation allows different power domains to be optimized independently, improving power consumption efficiency while managing complexity through systematic division.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Each partition is assigned its own LDO regulator to provide locally optimized power supply. This enables different power domains within the macro block to have tailored power characteristics suitable for their specific functional requirements, thereby improving overall power efficiency.

Inventive Principle:
Principle #3Local quality

4Reliability

If power isolation cells are inserted between partitions, then power domain separation is achieved, but device complexity increases

Engineering Contradiction:
Improvepower domain separationVSAvoidpower distribution structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

Power isolation cells are inserted between partitions to create electrically isolated power domains. This segmentation prevents noise and voltage fluctuations in one partition from affecting others, improving reliability while maintaining manageable complexity through structured isolation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Power isolation cells act as intermediary elements between adjacent partitions, providing electrical isolation and preventing cross-contamination of power domains. These isolation cells serve as mediators that protect each partition's independent power supply while maintaining overall system functionality.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables efficient power distribution by ensuring each partition operates with suitable supply voltage, reducing overall power consumption and eliminating power wastage, while also addressing congestion issues in chip layout.

Implementation Method 1

A plurality of low drop out (LDO) regulators are inserted into the respective partitions. Each of the LDO voltage regulators provides an output voltage as a supply voltage of the standard cells of the corresponding partition

Methodology Applied
Scientific EffectLow Drop Out (LDO) regulation:

Implementation Method 2

A plurality of power isolation cells are inserted between the partitions

Methodology Applied
Scientific EffectPower isolation: Electrical Resistance

Data Source

PatentUS9904752B2Methods for distributing power in layout of IC
Publication Date: 2018.02.27 MEDIATEK INC
  • US9904752B2 patent drawing
  • US9904752B2 patent drawing
  • US9904752B2 patent drawing

AI summary

A method for distributing power in the layout of an integrated circuit is provided. The integrated circuit includes at least one macro block. A first physical layout of the macro block is obtained, wherein the macro block includes a plurality of standard cells. The first physical layout is divided into a plurality of partitions according to an IR simulation result of the first physical layout. A plurality of power isolation cells are inserted between the partitions. A second physical layout is obtained according to the partitions and the power isolation cells. A macro placement of the macro block is obtained according to the second physical layout. Each of the partitions further includes a low drop out (LDO) regulator.