Integrated IC Power Rail Layout for Low-Resistance Dense Wiring
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Solution Overview
Problem
Integrated circuit semiconductor devices face increased wiring resistance and the risk of short circuits or leakage currents as they become more highly integrated, which existing technologies have not adequately addressed.
Innovation Solution
The integration of a base layer with placeholders and a metal power rail, along with nanosheet stacking structures and gate structures, reduces wiring resistance and prevents short circuits by electrically connecting source and drain regions through optimized metal wiring layers and insulating layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If integrated circuit devices are highly integrated, then device functionality and integration density are improved, but wiring resistance increases and the possibility of short circuit or leakage current increases
Solution Approach 1:
The power supply wiring is segmented into multiple independent metal power rails (first metal power rail, second metal power rail, third metal power rail) that are spatially separated and independently connected to power supply pads. This segmentation prevents short circuits between power rails while reducing wiring resistance through parallel current paths, directly resolving the contradiction between high integration density and reliability.
Solution Approach 2:
Insulating layers (first insulating layer, second insulating layer, third insulating layer) are introduced as intermediary elements between adjacent metal power rails and between power rails and other conductive structures. These intermediaries prevent direct contact and potential short circuits while allowing the closely spaced configuration needed for high integration density.
2Productivity
If integrated circuit devices are highly integrated, then device functionality and integration density are improved, but wiring resistance increases
Solution Approach 1:
Multiple metal power rails are merged in parallel to form a combined power supply network. The first, second, and third metal power rails are all connected to the same power supply potential and work together to reduce overall wiring resistance through parallel current paths, while maintaining high integration density through compact vertical stacking.
Solution Approach 2:
The patent transitions from planar wiring to three-dimensional vertical stacking of metal power rails. The first, second, and third metal power rails are positioned at different vertical levels (first surface, second surface, third surface) of the semiconductor substrate, utilizing the vertical dimension to reduce wiring resistance without increasing lateral footprint, thereby maintaining high integration density.
3Productivity
If integrated circuit devices are highly integrated, then device functionality and integration density are improved, but the possibility of leakage current increases
Solution Approach 1:
Insulating layers are positioned as intermediary barriers between adjacent metal power rails and between power rails and other conductive structures. These intermediaries prevent direct contact that could create leakage current paths, while allowing the closely spaced configuration needed for high integration density.
Solution Approach 2:
The power supply network is segmented into multiple isolated metal power rails with insulating barriers between them. This segmentation creates independent current paths that prevent leakage current from spreading between adjacent structures, maintaining reliability while achieving high integration density.
Data Source
AI summary
An integrated circuit semiconductor device includes a base layer including a first surface and a second surface, a gate structure on the first surface of the base layer, a first source and drain region on a side of the gate structure, a second source and drain region on another side of the gate structure, a first placeholder in the base layer in a lower portion of the first source and drain region and electrically connected to the first source and drain region, a second placeholder in the base layer in a lower portion of the second source and drain region, and a metal power rail on the first placeholder and the second placeholder on the second surface of the base layer and electrically connected to the first placeholder.