Integrated Circuit Power Rail Widening for Electromigration

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Solution Overview

Problem

Existing power rail design methods in integrated circuits face challenges with electromigration and voltage degradation, which are exacerbated by the need to increase metal layers, thereby complicating the design process.

Innovation Solution

A method that identifies power rails and domains in an integrated circuit design file, performs a design rule check to retrieve non-violating circuit regions, and widens the power rails to occupy these regions, improving electrical performance without violating design rules or consuming additional routing resources.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If more metal layers are used for power rails to reduce electromigration and voltage degradation, then electrical performance is improved, but device complexity and routing resource availability worsen

Engineering Contradiction:
Improveelectrical performanceVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

Instead of adding more metal layers (vertical dimension), the patent widens power rails within the existing layer structure (horizontal dimension). This dimensional shift allows improved electrical performance by increasing power rail width and occupying non-violating circuit regions without adding layer complexity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent changes the width parameter of power rails dynamically. By performing DRC checks and identifying non-violating circuit regions, the method adjusts power rail width within acceptable design rule boundaries, improving electrical performance without violating constraints or adding device complexity.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If more metal layers are used for power rails to reduce electromigration and voltage degradation, then electrical performance is improved, but routing resource availability worsens

Engineering Contradiction:
Improveelectrical performanceVSAvoidrouting resource availability
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent shifts from vertical expansion (adding layers) to horizontal expansion (widening within layers). This preserves routing resources on other layers while improving power rail electrical performance through increased width in non-violating regions.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

By modifying the width parameter of power rails based on DRC results and non-violating region identification, the patent improves electrical performance while maintaining routing resource availability for signal nets and other functions on unused portions of the circuit.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If power rail width is increased to improve electrical performance, then voltage degradation and electromigration are reduced, but design rule violations may occur

Engineering Contradiction:
Improveelectrical performanceVSAvoiddesign rule compliance
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent performs DRC checks before finalizing power rail widening. This preliminary verification ensures that widened power rails will not violate manufacturing design rules, allowing electrical performance improvement while maintaining design rule compliance.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The method uses DRC results as feedback to guide power rail widening. Non-violating circuit regions identified through DRC provide feedback on where widening is permissible, creating a closed-loop process that improves electrical performance while ensuring manufacturing compliance.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS11416665B2Power rail design method, apparatus and non-transitory computer readable medium thereof
Publication Date: 2022.08.16 REALTEK SEMICON CORP
  • US11416665B2 patent drawing
  • US11416665B2 patent drawing
  • US11416665B2 patent drawing

AI summary

A power rail design method is disclosed that includes the steps outlined below. A plurality of power rails and a plurality of power domains corresponding thereto in an integrated circuit design file are identified. A design rule check for a plurality of circuit units in the integrated circuit design file is performed to retrieve a plurality of non-violating circuit regions that correspond to the power rails in each of the power domains. The power rails corresponding to at least part of the plurality of non-violating circuit regions in the integrated circuit design file are widened to occupy at least part of the non-violating circuit regions for the plurality of power rails.