IC Program Protection Using Randomized Opcode Blocks

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Solution Overview

Problem

Existing counter-attack methods for protecting integrated circuits against physical attacks, such as side-channel and fault attacks, suffer from high performance impact and inefficiency, as they apply randomization methods uniformly across all code execution, revealing predictable timing patterns that can be exploited by attackers.

Innovation Solution

A method involving the creation of opcode blocks with randomized fictional opcodes and execution positions to mask the execution timings of original opcodes, implemented in hardware to protect sensitive program parts without impacting performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If random clock stealer or clock jitter is applied to all code execution, then security against timing attacks is improved, but performance deteriorates significantly

Engineering Contradiction:
Improvesecurity against timing attacksVSAvoidperformance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies randomization only to specific sensitive opcodes (such as cryptographic operations) rather than uniformly to all code execution. The processor identifies sensitive instructions and inserts fictional opcodes selectively around them, leaving non-sensitive code execution unchanged. This localized approach maintains security for critical operations while preserving overall system performance.

Inventive Principle:
Principle #3Local quality

2Reliability

If random delay functions are inserted in software to protect sensitive code, then security against timing attacks is improved, but code size and execution time increase

Engineering Contradiction:
Improvesecurity against timing attacksVSAvoidexecution time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent replaces software-based random delay functions with a hardware-level mechanism. The processor includes a random opcode generator and instruction replacement unit that automatically insert fictional opcodes at the hardware level during instruction decoding, eliminating the need for software function calls. This substitution reduces overhead by avoiding function call/return mechanisms and significantly decreases execution time compared to software-based approaches.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Reliability

If fictional opcodes are inserted to mask execution timings, then security against side-channel attacks is improved, but device complexity increases

Engineering Contradiction:
Improvesecurity against side-channel attacksVSAvoidprocessor structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent designs fictional opcodes with the same format and structure as real opcodes, allowing them to be processed by the existing processor decoding and execution infrastructure. The fictional opcodes use the same instruction format, register conventions, and execution pipeline as legitimate instructions. This universal compatibility means the processor can handle both real and fictional opcodes through the same hardware pathways without requiring separate complex processing mechanisms for each type.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS12499186B2Method to protect program in integrated circuit
Publication Date: 2025.12.16 THALES DIS FRANCE SA
  • US12499186B2 patent drawing
  • US12499186B2 patent drawing
  • US12499186B2 patent drawing

AI summary

Provided is a method for protecting a program in an integrated circuit product. The method includes creating one or more opcode blocs to respectively replace one or more original opcodes of said program, said opcode bloc comprising a number of fictional opcodes and the corresponding original opcode, said fictional opcodes being to be executed without taking into account their results and without impacting an expected result of said program, said number and a position of the original opcode in said opcode bloc being randomly determined by a random or pseudo random number generator of said integrated circuit product, and executing said one or more opcode blocs.