Integrated Circuit PUF Fabrication Using Random Interconnect Degradation
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Solution Overview
Problem
Existing Physical Unclonable Functions (PUFs) in integrated circuits are sensitive to environmental variations and aging, leading to reduced robustness and increased volatility, requiring expensive post-processing circuits for stabilization.
Innovation Solution
A method is introduced to secure integrated circuits by delimiting them into standard and security zones, where the interconnection structure is randomly degraded using contaminating elements, creating a non-clonable physical function modeled by random electrical continuity, which is insensitive to environmental changes without additional post-processing circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If PUFs operate at the limits of electronic constraints to achieve unique identification, then authentication capability is improved, but sensitivity to environmental variations increases leading to reduced robustness
Solution Approach 1:
The patent converts the harmful effect of environmental variations into a beneficial feature by deliberately introducing controlled defects during manufacturing. These defects create a stable, unique fingerprint that is intentionally made insensitive to environmental changes, transforming the problem of variability into a solution for robust authentication
Solution Approach 2:
The patent changes the operational parameters of the PUF by moving away from operating at the limits of electronic constraints. Instead, it uses controlled manufacturing defects that create stable electrical characteristics independent of environmental conditions like temperature and voltage fluctuations
2Reliability
If PUFs operate at the limits of electronic constraints to achieve unique identification, then authentication capability is improved, but aging effects increase causing the PUF to stop responding correctly
Solution Approach 1:
The patent applies beforehand cushioning by introducing controlled defects during manufacturing that pre-compensate for future aging effects. These defects create a stable baseline that remains unchanged over time, cushioning the PUF against degradation from aging and ensuring long-term authentication reliability
3Reliability
If post-processing circuits are added to stabilize PUF responses, then robustness is improved, but device complexity and manufacturing cost increase
Solution Approach 1:
The patent extracts the stabilization function from separate post-processing circuits and integrates it directly into the PUF structure itself through controlled manufacturing defects. This eliminates the need for additional external stabilization circuits, reducing device complexity while maintaining robustness
Solution Approach 2:
The patent merges the authentication function and the stabilization function into a single integrated PUF structure. The controlled defects serve dual purposes: creating the unique authentication fingerprint and simultaneously providing stability against environmental variations, eliminating the need for separate post-processing circuits
4Reliability
If controlled defects are introduced during manufacturing, then insensitivity to environmental variations is achieved, but manufacturing precision requirements increase
Solution Approach 1:
The patent applies partial action by introducing a controlled number of defects that is sufficient to create stability but not so many as to compromise functionality. The defect density and distribution are optimized to achieve the desired insensitivity to environmental variations while maintaining manufacturing feasibility
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach provides robust and secure authentication, resistant to replay attacks and environmental variations, while making cloning extremely difficult and reducing the impact of aging, without significant modifications to the manufacturing process.
Implementation Method 1
random degradation of an interconnection structure of said security zone thus forming a non-clonable physical function modeled by a random electrical continuity
Data Source
Figure 1~2
Figure 3A~3F
Figure 3G~3K
AI summary
The invention relates to a method for securing an integrated circuit during its fabrication, said method comprising the following steps: - delimitation of said integrated circuit (1) into a first zone called the standard zone (5a) and a second zone called the security zone (5b), and - random degradation of an interconnection structure (7b) of said security zone (5b), thus forming a non-clonable physical function modeled by a random electrical continuity that can be queried by a challenge-response authentication protocol. The invention also relates to a secure integrated circuit that can be obtained using such a method.