Integrated Circuit Receiver Eliminates 90-Degree Clock Signal

Solution Overview

Problem

High-speed signaling systems require efficient tracking of timing between data and clock signals, but conventional methods often necessitate additional power and pins due to the need for a 90-degree clock signal.

Innovation Solution

The use of integrated circuit receivers that combine an integrating receiver circuit and a sampling receiver circuit to detect data and edge values, eliminating the need for a separate 90-degree clock signal by employing a timing signal to determine early/late information, thereby reducing power consumption and pin count.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional identical edge and data samplers are used to maintain clock/data timing, then timing tracking is achieved, but additional power and pins are required for generating 90-degree clock signal

Engineering Contradiction:

Improvetiming trackingVSAvoidpower consumption

Core Design Contradiction:

ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent extracts and eliminates the need for the 90-degree clock signal generation from the system. By using a single clock signal to control both the data sampler and edge sampler with appropriate phase relationships established through feedback, the system removes the requirement for a separate quadrature clock signal, thereby reducing power consumption and pin requirements while maintaining timing tracking reliability

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The single clock signal serves multiple functions in the invention. It simultaneously controls the data sampler for data sampling and the edge sampler for edge detection, replacing the need for separate clock signals. This multi-functional use of a single clock signal reduces both power consumption and the number of pins required at the receiver end

Inventive Principle:

Principle #6Universality (Multi-functionality)

2Reliability

If conventional identical edge and data samplers are used to maintain clock/data timing, then timing tracking is achieved, but additional pins are required for 90-degree clock signal

Engineering Contradiction:

Improvetiming trackingVSAvoidpin count

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts and eliminates the need for the 90-degree clock signal generation from the system. By using a single clock signal to control both the data sampler and edge sampler with appropriate phase relationships established through feedback, the system removes the requirement for a separate quadrature clock signal, thereby reducing power consumption and pin requirements while maintaining timing tracking reliability

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The single clock signal serves multiple functions in the invention. It simultaneously controls the data sampler for data sampling and the edge sampler for edge detection, replacing the need for separate clock signals. This multi-functional use of a single clock signal reduces both power consumption and the number of pins required at the receiver end

Inventive Principle:

Principle #6Universality (Multi-functionality)

Data Source

PatentUS12200096B2Low power edge and data sampling

Publication Date: 2025.01.14 RAMBUS INC

AI summary

An integrated circuit receiver is disclosed comprising a data receiving circuit responsive to a timing signal to detect a data signal and an edge receiving circuit responsive to the timing signal to detect a transition of the data signal. One of the data or edge receiving circuits comprises an integrating receiver circuit while the other of the data or edge sampling circuits comprises a sampling receiver circuit.