Integrated Circuit Repair Using Supplemental FPGA Components
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Solution Overview
Problem
Integrated circuits often fail due to defective components, leading to significant time and financial losses as current repair methods are inefficient and resource-intensive, particularly in complex logic circuits where reprocessing or scrapping is common.
Innovation Solution
A system and method for repairing integrated circuits using detection logic to locate defective portions, a supplemental integrated circuit component like a field-programmable-gate-array (FPGA) to replace the defective part, and logic to identify interface locations, utilizing antifuse and fuse technologies for electrical connections and isolation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional repair methods using conductive material and spare gates are used, then defective logic can be reconnected, but significant time and financial resources are consumed
Solution Approach 1:
The patent divides the integrated circuit into functional segments and uses multiple independent detection logics to identify defective portions. By segmenting the detection process into separate logics (first detection logic, second detection logic, etc.), the system can efficiently locate and isolate specific defective areas without requiring comprehensive retesting of the entire circuit, thereby reducing repair time and resources.
Solution Approach 2:
The patent implements preliminary detection and identification of defective portions before actual repair actions are taken. The detection logics continuously monitor and identify defective areas in advance, allowing the system to prepare repair strategies (such as selecting appropriate supplemental integrated circuit components) before physical repair begins, thus reducing overall repair time and resource consumption.
2Measurement precision
If exhaustive testing is performed to identify defective components, then all defects can be detected, but the process consumes significant time and resources
Solution Approach 1:
The patent segments the testing process into multiple specialized detection logics, each responsible for specific types of defect detection. This segmentation allows parallel testing of different circuit aspects simultaneously, maintaining high detection accuracy while improving overall testing efficiency and reducing the time required for exhaustive testing.
Solution Approach 2:
The patent employs multiple detection logics that may detect overlapping or redundant information, ensuring that all defective portions are identified with high confidence. This partial redundancy in detection approaches guarantees comprehensive defect detection while allowing the system to focus repair efforts only on confirmed defective areas, thereby balancing accuracy with efficiency.
3Reliability
If the entire die is reprocessed to replace non-functional portions, then functional replacement is achieved, but significant time and financial resources are consumed
Solution Approach 1:
The patent identifies and isolates only the specific defective portions of the integrated circuit rather than reprocessing the entire die. By using detection logics to pinpoint exact defective areas and their interface locations, the system enables targeted replacement using supplemental integrated circuit components, dramatically reducing the scope of reprocessing required and associated time and resource costs.
Solution Approach 2:
The patent extracts and removes only the defective portions of the integrated circuit from the functional system. By identifying defective portions and their interface locations separately from the rest of the circuit, the system can selectively replace only the non-functional elements while preserving the majority of the original die, thereby minimizing reprocessing requirements and resource consumption.
4Productivity
If supplemental integrated circuit components are integrated to replace defective portions, then repair efficiency is improved, but precise identification of interface locations is required
Solution Approach 1:
The patent uses separate detection logics to independently identify both the defective portions and their interface locations. This segmented detection approach ensures that interface location identification is performed with the same level of precision as defective portion identification, enabling accurate integration of supplemental components without compromising repair efficiency.
Solution Approach 2:
The patent performs preliminary identification of interface locations before the actual integration of supplemental integrated circuit components. By detecting and marking interface locations in advance, the system prepares the circuit for precise component integration, ensuring that supplemental components are correctly positioned and connected, thereby maintaining both high repair efficiency and manufacturing precision.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables efficient and cost-effective repair of integrated circuits by accurately identifying and isolating defective areas and integrating functional replacements, reducing the need for extensive reprocessing and minimizing resource consumption.
Implementation Method 1
utilizing antifuse and fuse technologies for electrical connections and isolation
Implementation Method 2
utilizing antifuse and fuse technologies for electrical connections and isolation
Data Source
AI summary
Provided are systems for repairing an integrated circuit device. The systems include detection logic configured to locate a defective portion of an integrated circuit device, a supplemental integrated circuit component configured to functionally replace the defective portion, and logic configured to identify an interface location. Also provided are methods for repairing an integrated circuit device. The methods include the steps of: identifying a defective portion of an integrated circuit device; disconnecting existing circuit components; and incorporating a supplemental integrated circuit component with the integrated circuit device.