IC Repair Information Device Segmentation Clock Gating
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Solution Overview
Problem
As the number of memory blocks in integrated circuits increases, the size of repair information and loading time required to address faulty cells also increase, leading to inefficiencies in storage space and data loading.
Innovation Solution
A repair information providing device is implemented in integrated circuits, featuring faulty cell address registers, a repair information storage block, a repair information control block, and a clock gating block, which reduces storage space and loading time by selectively providing clock signals and memory block selection signals to only the necessary registers, allowing for efficient storage and loading of repair information.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the number of memory blocks is increased to improve circuit functionality, then the storage capacity and functionality are improved, but the size of repair information and loading time increase
Solution Approach 1:
The patent divides the repair information into segments associated with individual memory blocks. Each memory block has its own faulty cell address register that stores repair information only for that specific block, rather than loading all repair information for all memory blocks simultaneously. This segmentation reduces the amount of data that needs to be loaded and processed at once.
Solution Approach 2:
The patent pre-loads repair information into faulty cell address registers during a testing process before normal operation. The repair information is stored in compact form in a repair information storage block and only the necessary portions are loaded into registers when needed. This preliminary preparation reduces loading time during actual operation.
2Quantity of substance
If the number of memory blocks is increased to improve circuit functionality, then the storage capacity and functionality are improved, but the storage space for repair information increases
Solution Approach 1:
The patent extracts only the necessary repair information for each individual memory block and stores it in dedicated faulty cell address registers. Instead of storing complete repair information for all memory blocks in a single large storage area, the system extracts and distributes minimal necessary information to each block's register, reducing total storage space requirements.
Solution Approach 2:
The repair information storage is segmented into multiple small faulty cell address registers, each associated with a specific memory block. This segmentation allows each register to store only the repair information relevant to its associated block, rather than requiring a large centralized storage area for all repair information.
3Reliability
If all faulty cell address registers are updated simultaneously to ensure complete repair information is available, then reliability is improved, but loading time and power consumption increase
Solution Approach 1:
The patent applies local quality by providing repair information selectively to each faulty cell address register based on its specific needs. Each register receives and updates only the repair information relevant to its associated memory block, rather than all registers being updated with all repair information simultaneously. This localized approach maintains reliability while reducing overall loading time and power consumption.
Solution Approach 2:
The system dynamically loads repair information into faulty cell address registers based on operational needs rather than statically pre-loading all information. The repair information control block manages the dynamic updating of registers, loading information only when and where it is needed, optimizing the balance between reliability and loading efficiency.
Data Source
AI summary
A repair information providing device in an integrated circuit including a plurality of memory blocks includes a plurality of faulty cell address registers connected to the memory blocks, respectively, a repair information storage block configured to store repair information including an address of a faulty cell and a memory index indicating a memory block having the faulty cell, a repair information control block configured to read the repair information from the repair information storage block, transfer the address of the faulty cell included in the repair information to the respective faulty cell address registers, and generate a memory block selection signal based on the memory index included in the repair information, and a clock gating block configured to receive a clock signal, and selectively transfer the clock signal to one of the faulty cell address registers connected to the memory block having the faulty cell in response to receiving the memory block selection signal.