Integrated Circuit Resistors with Different Sheet Resistances
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Solution Overview
Problem
Integrated circuit designers are limited to a single sheet resistance for resistors within a chip, which restricts the optimization of design layout for increased density due to the need for multiple deposition, lithography, and etch steps for resistors made from different materials.
Innovation Solution
A method of fabricating integrated circuits with resistors of the same structure but different sheet resistances by concurrently forming doped semiconductive resistors, using dopant receiving materials, and annealing to differentiate their sheet resistances, allowing for resistors with the same material to have varying resistances.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If resistors of different materials are used to achieve different sheet resistances, then designers can obtain varied sheet resistances, but the fabrication process becomes costly and time consuming due to multiple deposition, lithography, and etch steps
Solution Approach 1:
The patent changes the dopant concentration parameter in the semiconductor substrate to achieve different sheet resistances. By controlling the amount and type of dopant introduced into specific regions during the annealing process, the invention creates resistors with varying sheet resistances from a single semiconductor layer, eliminating the need for multiple material depositions while achieving the desired electrical property variations.
Solution Approach 2:
The patent segments the dopant introduction process by applying dopant receiving materials selectively to different regions of the semiconductor substrate. This allows different portions of the semiconductor layer to receive different amounts of dopant, creating spatially varying sheet resistances within the same layer without requiring multiple separate resistor structures or materials.
2Adaptability or versatility
If multiple deposition, lithography, and etch steps are used to form resistors from different materials, then resistors with different sheet resistances can be formed, but the fabrication time and cost increase significantly
Solution Approach 1:
The patent merges the formation of multiple resistors with different sheet resistances into a single semiconductor layer. Instead of creating separate resistor structures through multiple deposition and patterning steps, the invention combines all resistor elements into one continuous semiconductor layer with spatially varying dopant concentrations, achieving different sheet resistances through a single annealing process.
Solution Approach 2:
The patent performs preliminary doping of the semiconductor substrate before the final annealing step. By pre-introducing dopant sources or dopant receiving materials into the semiconductor layer at strategic locations, the subsequent annealing process automatically creates the desired dopant concentration gradients, eliminating the need for multiple post-deposition patterning steps.
3Ease of manufacture
If a single semiconductor layer is used for all resistors, then fabrication is simplified, but all resistors have the same sheet resistance which limits design optimization
Solution Approach 1:
The patent applies local quality by creating spatially varying dopant concentrations within the single semiconductor layer. Different regions of the semiconductor layer are doped to different concentrations based on the local requirements of each resistor, allowing each resistor to have its optimal sheet resistance while maintaining structural uniformity and fabrication simplicity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables the integration of resistors with different sheet resistances within the same chip without requiring multiple material layers, allowing design engineers to optimize layout for increased density and performance without compromising circuit design.
Implementation Method 1
annealing the first and second resistors to cause a first sheet resistance of the first resistor to be different from a second sheet resistance of the second resistor
Data Source
AI summary
The fabrication of integrated circuits comprising resistors having the same structure but different sheet resistances is disclosed herein. In one embodiment, a method of fabricating an integrated circuit comprises: concurrently forming a first resistor laterally spaced from a second resistor above or within a semiconductor substrate, the first and second resistors comprising a doped semiconductive material; depositing a dopant receiving material across the first and second resistors and the semiconductor substrate; removing the dopant receiving material from upon the first resistor while retaining the dopant receiving material upon the second resistor; and annealing the first and second resistors to cause a first sheet resistance of the first resistor to be different from a second sheet resistance of the second resistor.