IC Chip Scan Test Frequency Segmentation
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Solution Overview
Problem
The existing scan test methods for integrated-circuit (IC) chips face challenges in reducing test time due to limitations in increasing shift frequency, which can lead to false defect detection and increased power consumption, and signal integrity issues, particularly in deep sub-micron manufacturing processes.
Innovation Solution
An apparatus and method that search for a usable shift frequency for each scan section within an IC chip, allowing different shift frequencies for various scan sections to optimize test results, thereby reducing test time and improving accuracy by adjusting frequencies based on specific scan patterns and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If the shift frequency is increased to reduce test time, then the test time is reduced, but false defect detection increases and power consumption increases
Solution Approach 1:
The scan path is divided into multiple scan sections, and different shift frequencies are applied to different scan sections. This segmentation allows the system to optimize test time for each section independently without causing false defect detections across the entire chip, as each section's frequency is tailored to its specific requirements.
Solution Approach 2:
Different shift frequencies are assigned to different scan sections based on their local characteristics. This local quality approach ensures that each scan section operates at an optimal frequency that minimizes false defect detections while still reducing overall test time, rather than applying a uniform frequency that would cause reliability issues.
2Loss of time
If the shift frequency is increased to reduce test time, then the test time is reduced, but power consumption increases
Solution Approach 1:
The scan path is divided into multiple scan sections with different shift frequencies. This segmentation allows power consumption to be optimized for each section independently, reducing overall power consumption while still achieving test time reduction by applying higher frequencies only where necessary.
Solution Approach 2:
The shift frequency parameter is changed for each scan section based on its specific requirements. By adjusting the frequency parameter locally rather than globally, the system reduces power consumption while maintaining test time efficiency, as each section operates at the minimum necessary frequency.
3Loss of time
If the shift frequency is increased to reduce test time, then the test time is reduced, but signal integrity issues increase
Solution Approach 1:
Dividing the scan path into multiple scan sections allows signal integrity to be maintained in sections where high-frequency operation would cause issues, while still achieving test time reduction in sections that can tolerate higher frequencies. Each section's frequency is optimized for its signal integrity characteristics.
Solution Approach 2:
Different shift frequencies are applied to different scan sections based on their local signal integrity requirements. This ensures that sections prone to signal integrity issues operate at lower frequencies that maintain signal quality, while other sections can operate at higher frequencies to reduce test time.
Data Source
AI summary
An apparatus for performing scan test of IC chip includes a shift-frequency searching unit that searches usable shift frequency for a target scan section among at least one scan section each including whole or part of at least one scan pattern inputted to a scan path. When searching usable shift frequency for the target scan section, the shift-frequency searching unit scales shift frequency of the target scan section differently from that of at least one scan section among scan sections shifted before or after the target scan section or sets shift frequency of the target scan section differently from that of the at least one scan section among the scan sections shifted before or after the target scan section, and searches shift frequency with which result of the scan test indicates pass or shift frequency with which result of the scan test indicates fail.