IC Schematic Connectivity Configuration for Visual Clutter Reduction

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Complex IC designs with thousands of circuit elements result in large and cluttered schematic diagrams, making it difficult for users to analyze and debug, as existing methods fail to effectively manage visual clutter and represent interconnections efficiently.

Innovation Solution

A method to configure the display of wire connectivity in IC schematic diagrams using user-selected criteria, such as net labels or connection lines, to reduce visual congestion, with options to hide unnecessary connections and represent them in a way that minimizes clutter, while allowing users to select based on factors like fan-outs, port types, and congestion scores.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of information

If all interconnections are displayed in the schematic diagram, then complete connectivity information is provided, but visual clutter increases making the diagram hard to analyze

Engineering Contradiction:
Improveconnectivity informationVSAvoidease of analysis
Core Design Contradiction:
Loss of informationVSEase of operation

Solution Approach 1:

The patent extracts and removes selected interconnections from the visual display while maintaining their data representation. Users can selectively hide fan-in or fan-out connections based on criteria, extracting only the necessary connectivity information for current analysis needs while removing visual clutter from unnecessary connections.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent implements dynamic control over interconnection visibility, allowing users to adjust which connections are displayed based on changing analysis requirements. The display configuration can be modified interactively to show or hide specific connection types, enabling adaptive visualization during the design process.

Inventive Principle:
Principle #15Dynamics

2Loss of information

If connection lines are used to represent all interconnections, then complete connectivity is shown, but visual congestion increases

Engineering Contradiction:
Improveconnectivity representationVSAvoidvisual complexity
Core Design Contradiction:
Loss of informationVSDevice complexity

Solution Approach 1:

The patent extracts specific connection paths from the full set of interconnections and removes them from visual display while preserving their connectivity data. By selecting which connection lines to hide based on user-defined criteria, the system maintains complete connectivity information internally while reducing visual complexity in the display.

Inventive Principle:
Principle #2Taking out (Extraction)

3Ease of operation

If net labels are used instead of connection lines, then visual clutter is reduced, but detailed path information is lost

Engineering Contradiction:
Improveease of analysisVSAvoidconnection path detail
Core Design Contradiction:
Ease of operationVSLoss of information

Solution Approach 1:

The patent implements dynamic switching between connection line and net label representation. Users can interactively change the display mode for different connection types or regions, allowing detailed path information to be shown when needed while maintaining reduced visual clutter in other areas. This dynamic adjustment enables flexible information presentation based on analysis requirements.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS8205183B1Interactive configuration of connectivity in schematic diagram of integrated circuit design
Publication Date: 2012.06.19 ALTERA CORP
  • US8205183B1 patent drawing
  • US8205183B1 patent drawing
  • US8205183B1 patent drawing

AI summary

Methods, computer program products, and systems for interactively configuring the display of connectivity of a schematic diagram based on an integrated circuit (“IC”) design are provided. Using a set of criteria, the schematic diagram can be configured to reduce visual congestion caused by interconnections among circuit elements in the IC design. The criteria include interconnections having a specific number of fan-outs, interconnections connecting ports of specific types, interconnections connecting selected types of circuit elements, and interconnections connecting circuit elements with specific names. The amount of clutter caused by individual nets can also be reduced based on the total congestion score associated with each net. The total congestion score is calculated based on the number of bends that a net makes, the number of crossovers that a net makes, and the number of pixels required to draw the net. Configuration of the connectivity in a schematic diagram is performed through a graphical user interface on a display device, which is connected to a computer system.