IC Security Framework Using RTL Obfuscation and Logic Transformation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The increasing demand for hardware electronics outsourcing to untrusted third-party entities has led to vulnerabilities in integrated circuits, such as oracle-guided attacks, brute-force attacks, and structural-based attacks, compromising confidentiality and integrity.
Innovation Solution
A multi-layered framework for integrated circuit security, including NoC routing table configuration, state space transformation, Boolean Algebraic Transformation, and Lookup Table Configuration, to protect against functional and structural attacks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If hardware electronics development, fabrication, and assembly are outsourced to third-party entities, then productivity and manufacturing efficiency are improved, but security and reliability deteriorate due to untrusted entities having access to design information
Solution Approach 1:
The design is segmented into multiple abstraction levels (RTL source code, netlist, gate-level implementation) with security measures applied at each level. The obfuscation framework processes design information through distinct transformation stages, applying different protection techniques appropriate to each representation level, thereby maintaining security while enabling outsourced manufacturing.
Solution Approach 2:
The patent introduces an intermediary obfuscation framework that sits between the trusted design owner and untrusted fabrication entities. This framework transforms the original design into an obfuscated version that can be safely outsourced, acting as a mediator that protects sensitive information while still allowing third-party manufacturing to proceed.
2Reliability
If routing tables and security-critical logic are removed from RTL source code, then security against structural attacks is improved, but device complexity increases due to replacement with programmable memory and lookup tables
Solution Approach 1:
The patent changes the representation parameters of critical design elements. Routing tables are transformed from fixed memory structures into programmable memory with encrypted contents. Security-critical logic is transformed from explicit gate-level implementations into lookup tables with obfuscated truth tables. These parameter changes increase security while managing complexity through systematic transformation rules.
3Reliability
If state space of embedded state machines is transformed, then security against oracle-guided attacks is improved, but ease of operation deteriorates due to transformed state transitions
Solution Approach 1:
The patent applies dimensionality change by transforming the state space representation. Instead of modifying the fundamental state machine structure, the framework applies transformations in the representation dimension (encoding/decoding layers, permuted state transitions). This allows security enhancement while maintaining a mapping to the original design for debugging and verification purposes.
4Reliability
If combinational logic is transformed using Boolean Algebraic Transformation, then security against functional attacks is improved, but manufacturing precision requirements increase due to complex logic transformations
Solution Approach 1:
The patent applies preliminary action by performing Boolean Algebraic Transformation during the design phase, before fabrication. The framework pre-computes and embeds transformation keys and obfuscated logic structures into the design, so that the actual manufacturing process deals with already-secured logic rather than requiring precise implementation of complex transformations during fabrication.
Data Source
AI summary
Various embodiments of the present disclosure provide a multi-layered framework for security of integrated circuits. In one example, an embodiment provides for removing one or more routing tables in a Register Transfer Level (RTL) source code that models a design for an SoC via a hardware description language, comprising replacing the one or more routing tables in the RTL source code with respective programmable memory, transforming a state space of one or more embedded state machines in the RTL source code, transforming one or more portions of combinational logic in the RTL source code, and/or removing one or more portions of security-critical logic in the RTL source code, comprising replacing the one or more portions of security-critical logic in the RTL source code with respective lookup tables.


