Integrated Circuit Short-Circuit Detection via Time-Based Determination
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Solution Overview
Problem
Existing integrated circuits lack the capability to effectively determine whether the output of a buffer circuit and a substrate line are short-circuited, which can lead to overcurrent and potential damage.
Innovation Solution
An integrated circuit comprising a signal generating circuit, a buffer circuit, a detection circuit, and a determination circuit that generates drive signals to turn on and off a transistor, detects a predetermined time period, and determines if a short-circuit occurs by analyzing the elapsed time since the drive signal reaches a specific logic level.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If the drive capacity of the buffer circuit is improved to control larger power transistors, then the ability to drive larger power transistors is enhanced, but the risk of overcurrent damage increases when short-circuits occur
Solution Approach 1:
The determination circuit performs preliminary detection of short-circuits by monitoring the voltage at the output terminal before the buffer circuit is fully activated. By detecting whether the voltage remains at a predetermined level (indicating a short-circuit condition) during a specific time period after the drive signal transitions, the system identifies potential short-circuits in advance and prevents overcurrent damage before it occurs.
Solution Approach 2:
The determination circuit continuously monitors the output voltage of the buffer circuit and provides feedback about the electrical state at the terminal. This feedback mechanism allows the system to detect short-circuit conditions by observing whether the voltage remains abnormally low during the critical time period, enabling real-time protection without requiring additional external monitoring components.
2Device complexity
If no short-circuit detection mechanism is implemented, then the device complexity remains low, but the buffer circuit may be destroyed due to overcurrent
Solution Approach 1:
The determination circuit is integrated within the switching control IC itself, allowing the same chip to perform both buffer driving and short-circuit detection functions. This multi-functionality approach enables the system to gain protection capabilities without adding separate external monitoring circuits, thereby minimizing the increase in overall device complexity while achieving reliable short-circuit protection.
3Reliability
If continuous monitoring is performed to detect short-circuits, then the protection reliability is improved, but the loss of time for normal operation increases
Solution Approach 1:
Instead of continuous monitoring, the determination circuit performs short-circuit detection periodically at specific moments - namely, during a defined time period after the drive signal transitions to the on-state. This periodic detection approach captures the critical window when a short-circuit would manifest, ensuring detection accuracy while allowing the buffer circuit to operate normally during other periods, thus minimizing loss of operation time.
Data Source
AI summary
A power supply circuit, including a rectifier circuit, an inductor having a voltage from the rectifier circuit applied thereto, a transistor for controlling a current flowing through the inductor, and an integrated circuit that performs switching of the transistor. The integrated circuit includes a signal generating circuit that generates a drive signal that reaches first and second logic levels to respectively turn on and off the transistor, a buffer circuit that generates first and second voltages for turning on and off the transistor based on the drive signal at the first and second logic levels, respectively, a detection circuit that detects elapse of a time period from when the drive signal reaches the first logic level to a predetermined timing before the drive signal reaches the second logic level, and a determination circuit that determines whether the terminal is short-circuited when the time period has elapsed since the drive signal reaches the first logic level.