IC Internal Signal Testing via Selective Buffering
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Solution Overview
Problem
Current methods for testing integrated circuits, particularly for internal analog signals, are limited by the need for direct signal access without distortion, as buffers can interfere with small oscillations and require complex decision-making about impedance and capacitance sensitivity, which is often determined at the design stage, making it difficult to accurately measure and trim signals like bandgap voltage.
Innovation Solution
A flexible solution that allows selective buffering or direct connection of internal signals to external pins using a multiplexor circuit, with optional unity gain or non-unity gain buffers, enabling accurate measurement and calibration to avoid gain or offset errors, and accommodating signals with varying impedance and capacitance sensitivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If a buffer is used to access internal signals, then signal drive strength is improved, but small oscillations are interfered with and measurement precision deteriorates
Solution Approach 1:
The patent implements a dynamic selection mechanism that allows the testing system to switch between buffered and direct signal paths based on the specific signal characteristics being measured. A multiplexor circuit enables flexible routing of internal signals either through a buffer (for weak signals needing amplification) or directly to the tester (for signals requiring high measurement precision), resolving the contradiction between drive strength and measurement accuracy.
2Measurement precision
If direct signal connection is used, then measurement precision is improved, but signal drive strength is insufficient and reliability deteriorates
Solution Approach 1:
The patent introduces a buffer circuit as an intermediary component that can be selectively inserted between the internal signal source and the external tester. This intermediary provides signal buffering and drive strength enhancement when needed, while allowing direct connection when measurement precision is the priority, thus resolving the contradiction between measurement accuracy and signal accessibility reliability.
3Power
If buffering is always applied, then signal drive strength is improved, but device complexity increases due to impedance and capacitance considerations
Solution Approach 1:
The patent employs a dynamic configuration approach where the buffer insertion is not fixed but can be selectively enabled or disabled based on testing requirements. The multiplexor-based switching mechanism allows the system to adapt its configuration, reducing unnecessary buffering for signals that don't require it and thereby reducing overall device complexity while maintaining signal drive strength when needed.
4Device complexity
If direct connection is used, then device complexity is reduced, but signal measurement accuracy deteriorates for sensitive signals
Solution Approach 1:
The patent introduces a selectively-insertible buffer circuit that acts as an intermediary for sensitive signals. This buffer can be activated only when measuring signals that require it (such as bandgap voltage), maintaining measurement precision for sensitive signals while keeping the overall system simple for signals that don't require buffering, thus resolving the contradiction between device complexity and measurement accuracy.
Data Source
AI summary
An integrated circuit (IC) is provided with functional logic having a plurality of internal signal lines and test logic. The test logic has a plurality of inputs coupled to the plurality of internal signal lines and with an output coupled to a first external pin of the integrated circuit. The test logic includes a buffer, and the test logic is configured to selectively couple each of the signals received on the plurality of signal lines either directly or via the buffer to the first external pin of the IC. The test logic is configured to selectively couple a signal received on a second external pin of the IC either via the buffer to the first external pin of the IC in order to calibrate the buffer.