Simulation Checkpoint Recovery for IC Error Injection Testing

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Solution Overview

Problem

The testing of integrated circuits, particularly recovery testing, is challenging due to the complexity of simulation code and the need for in-depth knowledge to reset software queues and simulation expectations, especially when the code has been developed over many years with multiple owners, leading to increased coding effort.

Innovation Solution

A method and system for integrated circuit recovery testing using simulation checkpoints, which involves executing an error injection test, creating a checkpoint of the circuit's state after clock stopping and quiescing domains, and applying this checkpoint for a recovery reset during a mainline test to determine if the test executed correctly.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional recovery testing methods are used with manual code management, then comprehensive testing coverage can be achieved, but the coding effort and complexity increase significantly

Engineering Contradiction:
Improvetesting coverageVSAvoidcoding effort
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The system performs preliminary actions by automatically resetting software queues and simulation expectations before each recovery test scenario. This preparatory reset mechanism eliminates the need for manual code management and reduces coding effort while maintaining comprehensive testing coverage.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces an intermediary mechanism that automatically manages the simulation environment state. This intermediary handles the complex tasks of resetting queues and expectations, acting as a mediator between the test scenarios and the simulation code, thereby reducing the complexity of direct code management.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If simulation code is developed over many years with various code owners, then functionality can be enhanced, but the difficulty of implementing recovery test scenarios increases

Engineering Contradiction:
ImprovefunctionalityVSAvoidimplementation difficulty
Core Design Contradiction:
Adaptability or versatilityVSDifficulty of detecting and measuring

Solution Approach 1:

The system implements self-service by automatically managing its own simulation environment state without requiring deep knowledge of the simulation code. The automatic reset mechanism serves itself by handling queue and expectation management, reducing implementation difficulty despite the code's evolution over time with multiple owners.

Inventive Principle:
Principle #25Self-service

3Measurement precision

If manual management of software queues and simulation expectations is performed, then test accuracy can be maintained, but the coding effort and time required increase

Engineering Contradiction:
Improvetest accuracyVSAvoidcoding time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The system performs preliminary resetting of software queues and simulation expectations automatically before each test scenario. This preliminary action maintains test accuracy by ensuring a clean state while eliminating the time-consuming manual management of these elements.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback mechanisms that automatically track and reset the simulation environment state. This feedback system maintains test accuracy by monitoring queue and expectation states while reducing coding time through automated management rather than manual intervention.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS7721176B2Method, system, and computer program product for integrated circuit recovery testing using simulation checkpoints
Publication Date: 2010.05.18 X CORP
  • US7721176B2 patent drawing
  • US7721176B2 patent drawing
  • US7721176B2 patent drawing

AI summary

A method, system, and computer program product for integrated circuit recovery testing using simulation checkpoints is provided. The method includes executing an error injection test on an integrated circuit that includes a plurality of domains and latches. The error injection test includes injecting an error into one of the domains, clock stopping the domain with the error, performing fencing between the domain with the error and the other domains, and quiescing the other domains. A checkpoint is created of a state of the integrated circuit after the clock stopping, fencing and quiescing have been completed. A mainlines test of the integrated circuit is executed. The mainline test includes applying the checkpoint to the integrated circuit, and performing a recovery reset of the stopped domain. It is determined if the mainline test executed correctly and the results of the determining are output.