Integrated Circuit Slave ID Reset via Shared Bus Memory Match

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Solution Overview

Problem

Existing systems require dedicated external pins or multiple IC versions to reset slave identification (SID) for multiple identical integrated circuits sharing a common bus, leading to pin wastage and increased design and manufacturing costs.

Innovation Solution

A method and system that allow resetting of SIDs for multiple identical ICs over a shared bus by identifying unique data in common memory addresses and comparing it with received match data to change the SID value, eliminating the need for external pins and multiple IC versions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If dedicated external pins are used to set unique SID for each identical IC, then unique SID can be achieved, but pins are wasted that could be used for other purposes

Engineering Contradiction:
Improveunique SID assignmentVSAvoidpin usage
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent extracts the SID configuration function from external pins and relocates it to internal memory resources. Each IC contains a unique identifier in its memory space that can be read over the shared bus, eliminating the need for dedicated external pins while maintaining unique SID assignment for each IC.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces memory space as an intermediary between the IC hardware and the SID configuration function. Instead of direct pin-to-SID mapping, the system uses memory addresses as intermediaries to store and communicate unique identifiers, allowing SID configuration without additional physical pins.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If multiple different versions of the same IC are manufactured with separate SIDs, then unique SID can be achieved, but design and manufacturing costs increase

Engineering Contradiction:
Improveunique SID assignmentVSAvoiddesign and manufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent applies local quality by embedding unique identifiers in the memory space of each IC rather than creating different hardware versions. This allows identical IC designs to be manufactured at the same cost while still providing unique SIDs through localized memory content differentiation.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the parameter of SID assignment from hardware-version-based to memory-content-based. By storing unique identifiers in memory rather than hardcoding them into different IC versions, the system maintains manufacturing simplicity while achieving unique SID assignment.

Inventive Principle:
Principle #35Parameter changes

3Ease of manufacture

If identical ICs are manufactured with the same SID, then manufacturing is simplified, but communication with multiple identical ICs over a shared bus becomes problematic

Engineering Contradiction:
ImproveIC manufacturing simplicityVSAvoidcommunication capability
Core Design Contradiction:
Ease of manufactureVSEase of operation

Solution Approach 1:

The patent performs preliminary action by pre-configuring unique identifiers in the memory space of each IC during manufacturing. This allows identical ICs to be manufactured with the same design while having unique SIDs ready in advance, enabling immediate communication capability without additional configuration steps.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10169274B1System and method for changing a slave identification of integrated circuits over a shared bus
Publication Date: 2019.01.01 QUALCOMM INC
  • US10169274B1 patent drawing
  • US10169274B1 patent drawing
  • US10169274B1 patent drawing

AI summary

Systems and methods are disclosed resetting a slave identification (SID) of an integrated circuit (IC). An exemplary method comprises determining that a plurality of ICs in communication with a shared bus have the same SID, the shared bus operating in a master/slave configuration. A common memory address of the ICs is identified, where data stored in the common memory address is different for a first IC and a second IC. Each of the ICs receives over the shared bus a new SID value and match data. The ICs compare the match data with the data stored in the common memory address. If the match data is the same as the data in the common memory address, the SID is changed the received new SID value.