IC State Machine Security Through Hidden Temporal Transitions
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Solution Overview
Problem
Integrated circuits (ICs) are vulnerable to IP theft, counterfeiting, and hardware Trojan insertion due to the rise of commercial foundries and third-party IP, with existing security measures like logic encryption being susceptible to SAT attacks.
Innovation Solution
Implementing hidden state transitions in ICs using frequency-dependent, state-dependent, and temporally-dependent keys to create security against SAT attacks, masking circuit information and requiring time-domain dependencies only available to the IC designer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If logic encryption is implemented to protect against IP theft and hardware Trojan insertion, then security against reverse engineering is improved, but vulnerability to SAT attacks increases
Solution Approach 1:
The patent applies dynamics by making the finite state machine transitions time-dependent rather than static. The key vector changes over time based on the current state and external inputs, so that the same physical circuit exhibits different logical behavior at different times. This temporal dynamics prevents SAT attacks because the attacker cannot capture a complete static model of all possible transitions, fundamentally changing the attack landscape from static logic analysis to dynamic temporal analysis.
Solution Approach 2:
The patent adds a time dimension to the state machine transitions, moving from a two-dimensional state-transition graph to a four-dimensional hypergraph that includes temporal information. By encoding transitions with time stamps and state-dependent key vectors, the system creates a new dimension of complexity that SAT solvers cannot efficiently process, as they traditionally operate on static logical models without temporal awareness.
2Reliability
If FSM partitioning into obfuscated and functional modes is used to secure logic, then resistance to extraction attacks is improved, but device complexity increases
Solution Approach 1:
The patent merges the obfuscation functionality directly into the state machine transitions themselves rather than using separate partitioned structures. The key vector generation and state transition logic are combined into a unified temporal state machine model, where the obfuscation is achieved through time-dependent key application rather than through separate obfuscated/functional mode partitioning. This integration reduces structural complexity while maintaining security.
Solution Approach 2:
The patent changes the parameters of the state machine from static transition definitions to time-dependent transition parameters. Instead of having fixed transition conditions, the system uses time-varying key vectors that depend on current state and inputs. This parameter transformation achieves obfuscation through temporal variation rather than through complex structural partitioning, simplifying the overall device architecture.
3Reliability
If incorrect state transitions are added during normal operation to limit SAT attacks, then security against key extraction is improved, but circuit overhead increases
Solution Approach 1:
The patent implements self-service by having the state machine automatically generate time-dependent key vectors based on its own internal state and external inputs. The system uses its own operational parameters (current state, input signals, time) to generate the obfuscation keys, eliminating the need for separate key management circuitry or external key injection mechanisms. This self-generating approach adds security without requiring additional dedicated hardware resources.
Solution Approach 2:
The patent makes the state machine transitions serve multiple functions: they perform the intended circuit functionality while simultaneously providing security obfuscation through time-dependent key application. The same transition logic that executes the circuit operation also generates the obfuscation key for that transition, making the transition mechanism universal rather than requiring separate security circuitry. This multi-functionality reduces overall circuit overhead.
Data Source
AI summary
A state machine system on a chip presents hidden state transitions to create IC knowledge not available in a logical netlist and temporal key dependencies to increase the difficulty of executing the SAT attack. The change in the state space of a circuit over time may be used to increase circuit security. Hidden transitions that are frequency dependent, state dependent keys, and temporally dependent transition keys may be used as ways to increase security against SAT based attacks.