Integrated Circuit State Retention via Scan Chain Shift
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Solution Overview
Problem
Integrated circuit devices, such as FPGAs, typically lose their state information when powered down, making it difficult to restore them to their previous operational state upon power-up, which is crucial for efficient power management in systems with repeated active and inactive cycles.
Innovation Solution
The solution involves configuring the integrated circuit to form a scan chain of registers, shifting the state information to a non-volatile memory module, and placing the circuit in a reduced power consumption state, allowing for the retention of configuration data and state information during power-down and subsequent restoration upon power-up.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the integrated circuit is powered down to reduce power consumption, then power consumption is reduced, but state information is lost
Solution Approach 1:
Before powering down the integrated circuit, the control circuitry performs a preliminary action by shifting state information from the registers through the scan chain to the non-volatile memory module. This preliminary data transfer ensures that all critical state information is preserved in non-volatile storage before the power-down operation occurs, resolving the contradiction between reducing power consumption and maintaining state information.
2Loss of information
If the integrated circuit operates continuously to maintain state information, then state information is preserved, but power consumption increases
Solution Approach 1:
The patent introduces a non-volatile memory module as an intermediary storage device between the registers and the power-down state. This intermediary allows state information to be transferred to and stored in non-volatile memory before power is reduced, enabling state retention without requiring continuous operation. The non-volatile memory acts as the mediator that preserves state information while allowing the circuit to enter low-power mode.
3Loss of information
If registers are configured to form a scan chain for data transfer, then state information can be shifted to memory, but device complexity increases
Solution Approach 1:
The patent implements multi-functionality by configuring the registers to operate in dual modes: normal operational mode for regular circuit function and scan mode for state information transfer. The same register structure serves both purposes, eliminating the need for separate dedicated scan registers. This universal approach allows the scan chain to be activated only when needed for power-down preparation, reducing overall device complexity while enabling state information retention.
Data Source
AI summary
A method of operating an integrated circuit that includes a plurality of registers may include receiving a sleep mode request for the integrated circuit. The sleep mode request may be a control signal received with control circuitry on the integrated circuit. The plurality of registers may be configured to operate as a scan chain when the sleep mode request is received. Integrated circuit state information that are stored in the plurality of registers may be retrieved by operating the scan chain and stored in a memory module. The integrated circuit may be placed in a sleep mode. Placing the integrated circuit in the sleep mode may reduce power consumption of the integrated circuit.