2D-3D Hybrid Stress Analysis for IC Layout Screening

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current methods for stress analysis of integrated circuits, particularly with low-k dielectric materials, are time-consuming and inefficient due to the need for 3-dimensional finite element analysis, which is prohibitive for large layouts, and fail to accurately identify high-stress regions that can lead to yield or field failures.

Innovation Solution

A high-performance stress analyzer that uses 2-dimensional stress analysis to quickly identify high-stress regions on a layout plane, followed by localized 3-dimensional stress simulation, reducing the number and size of volumetric regions for detailed analysis, thereby enabling faster and more comprehensive stress analysis of large chip layouts.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If 3-dimensional finite element analysis is performed for stress analysis, then measurement precision is improved, but productivity deteriorates

Engineering Contradiction:
Improvestress analysis accuracyVSAvoidanalysis speed
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The patent segments the analysis process into two distinct stages: a fast 2D stress analysis stage that screens the entire layout to identify high-stress regions, and a detailed 3D finite element analysis stage that focuses only on those identified regions. This segmentation allows the system to achieve both high productivity through rapid initial screening and high measurement precision through targeted 3D analysis of critical areas, rather than performing computationally expensive 3D analysis on the entire layout.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies local quality by performing high-precision 3D stress analysis only in specific localized regions where high stress is predicted by the 2D analysis, rather than uniformly applying 3D analysis across the entire layout. This approach concentrates computational resources on areas of interest, improving both analysis accuracy for critical regions and overall productivity by avoiding unnecessary 3D analysis in low-stress areas.

Inventive Principle:
Principle #3Local quality

2Reliability

If 3-dimensional finite element analysis is performed on large layouts, then reliability is improved, but loss of time increases

Engineering Contradiction:
Improvestress failure prediction accuracyVSAvoidanalysis time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent performs preliminary 2D stress analysis on the entire layout before conducting 3D finite element analysis. This preliminary action identifies high-stress regions that require detailed 3D analysis, allowing the system to achieve reliable stress failure prediction in critical areas while significantly reducing the total analysis time by avoiding unnecessary 3D analysis in low-stress regions.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent extracts and isolates the high-stress regions identified by the 2D analysis for separate 3D finite element analysis. By taking out only the critical regions from the full layout for detailed 3D analysis, the system achieves reliable stress failure prediction where needed while minimizing the time loss associated with 3D analysis.

Inventive Principle:
Principle #2Taking out (Extraction)

3Productivity

If 2-dimensional stress analysis is used, then productivity is improved, but measurement precision deteriorates

Engineering Contradiction:
Improveanalysis speedVSAvoidstress distribution accuracy
Core Design Contradiction:
ProductivityVSMeasurement precision

Solution Approach 1:

The patent merges 2D stress analysis and 3D finite element analysis into a hybrid approach where the 2D analysis provides rapid screening and the 3D analysis provides detailed precision analysis of identified high-stress regions. This combination allows the system to achieve both high productivity through the fast 2D screening and high measurement precision through the detailed 3D analysis of critical areas.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent uses 2D stress analysis as an intermediary step between layout input and 3D finite element analysis. This intermediary 2D analysis quickly identifies high-stress regions that serve as input for the subsequent 3D analysis, allowing the system to maintain both high productivity through rapid initial screening and high measurement precision through detailed 3D analysis of critical regions.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS7543254B2Method and apparatus for fast identification of high stress regions in integrated circuit structure
Publication Date: 2009.06.02 SYNOPSYS INC
  • US7543254B2 patent drawing
  • US7543254B2 patent drawing
  • US7543254B2 patent drawing

AI summary

Roughly described, high-stress volumetric regions of an integrated circuit structure are predicted by first scanning one or more layout layers to identify planar regions of high 2-dimensional stress, and then performing the much more expensive 3-dimensional stress analysis only on volumetric regions corresponding to those planar regions that were found to have high 2-dimensional stress. A windowing method can be used for the 2-dimensional scan, optionally with an overlap region extending slightly into adjacent windows. Very narrow features arising at the edges of an analysis window can be relocated to the edge of the analysis window in order to avoid numerical artifacts.