IC Package Substrate Cu2O Interlayer for Copper-Glass Bonding
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Solution Overview
Problem
Conventional copper clad laminates used in IC packages face issues with high-temperature deformation and bulk modulus, and the bonding force between copper deposits and glass is insufficient, leading to conductivity problems and disconnections due to the high aspect ratio of holes and limitations in deposition processes like sputtering and CVD.
Innovation Solution
A substrate for IC packages is designed with a glass core, copper metal thin films, and an interlayer of Cu2O or metal oxides doped with transition metals, which enhances the bonding force between the copper metal line and the glass, improving electrical conductivity and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If electroless plating is used to deposit Cu in the hole, then the bonding force between Cu and glass is improved, but the bonding force is still insufficient leading to conductivity problems and disconnections
Solution Approach 1:
An interlayer comprising Cu2O or a metal oxide is introduced between the Cu metal line and the glass core. This interlayer acts as a mediator that enhances the bonding force between Cu and glass, preventing disconnection and ensuring reliable electrical conductivity through the substrate.
Solution Approach 2:
The substrate structure employs composite materials including the glass core, Cu metal thin films, Cu metal line, and the Cu2O or metal oxide interlayer. This composite structure combines materials with complementary properties to achieve both strong bonding and reliable electrical conductivity.
2Manufacturing precision
If physical deposition process like sputtering is used, then deposition quality is improved, but it cannot be used due to the high aspect ratio of the hole
Solution Approach 1:
The invention changes the deposition parameters by using electroless plating instead of physical deposition methods. This parameter change allows deposition in high aspect ratio holes where sputtering cannot reach, making the process feasible while maintaining adequate deposition quality.
3Manufacturing precision
If CVD is used for deposition, then deposition quality is improved, but high temperature processing may deform the substrate
Solution Approach 1:
The invention replaces the thermal field-based CVD process with a chemical field-based electroless plating process. This substitution eliminates the need for high temperature processing that could deform the glass core substrate, while still achieving high quality Cu deposition in the holes.
4Ease of manufacture
If Cu is deposited using electroless plating, then the process is feasible for high aspect ratio holes, but the bonding force between Cu and glass is insufficient
Solution Approach 1:
The Cu2O or metal oxide interlayer serves as an intermediary between the Cu metal line and glass core, enhancing the bonding force. This allows the electroless plating process to remain feasible for high aspect ratio holes while solving the insufficient bonding force problem through the interlayer's mediating作用.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The enhanced bonding force between the copper metal line and glass core results in superior electrical conductivity, reliability, and increased yield, reducing manufacturing costs by addressing the limitations of existing deposition methods.
Implementation Method 1
superior electrical conductivity and reliability are obtained through improving bonding force between a metal line connecting the upper and lower portions of the substrate and glass disposed within the substrate
Implementation Method 2
when Cu is deposited in the hole using electroless plating
Data Source
AI summary
The present invention relates to an integrated circuit package substrate and, more specifically, to an integrated circuit package substrate, which exhibits excellent conductivity and reliability through the improvement of an adhesive force between a metal line for electrically connecting an upper part and a lower part of the integrated circuit package substrate and glass formed inside the integrated circuit package substrate. To this end, the present invention provides the integrated circuit package substrate comprising: a core part made of glass; a first metal thin plate formed on the upper part of the core part and made of Cu; a second metal thin plate formed at the lower part of the core part and made of Cu; a metal line formed in a shape in which the metal line penetrates through the first metal thin plate, the core part, and the second metal thin plate so as to electrically connect the first metal thin plate and the second metal thin plate, and made of Cu; and an intermediate layer formed on the outer circumferential surface of the metal line, wherein the intermediate layer includes any one of Cu2O, Cu2O doped with a transition metal, and a metal oxide including Cu and a transition metal.