IC Substrate Thickness Layout for Low-Noise Power Vias

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Solution Overview

Problem

Highly integrated integrated circuit semiconductor devices face challenges with power transmission noise and the difficulty of forming vias due to the aspect ratio of vias, which is increased by the varying thickness of substrates containing individual elements of different thicknesses.

Innovation Solution

The integrated circuit semiconductor device features a substrate with regions of different thicknesses, where the power via penetrates through and is connected to both a multilayer wiring layer on the surface and beneath the substrate, reducing power transmission noise by separating signal and power transmission networks and optimizing the aspect ratio of vias through varying substrate thickness.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the substrate thickness is increased to accommodate individual elements of different thicknesses, then the reliability of power transmission is improved, but the aspect ratio of vias increases making via formation more difficult

Engineering Contradiction:
Improvepower transmission reliabilityVSAvoidvia formation ease
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The substrate is designed with different thicknesses in different regions: a first thickness in the first region and a second thickness (greater than the first thickness) in the second region. This local variation in substrate thickness allows the power via in the second region to have a lower aspect ratio and be easier to form, while maintaining sufficient thickness elsewhere for reliable power transmission.

Inventive Principle:
Principle #3Local quality

2Object-affected harmful factors

If the substrate thickness is uniformly increased, then power transmission noise is reduced, but the aspect ratio of all vias increases reducing manufacturing precision

Engineering Contradiction:
Improvepower transmission noiseVSAvoidvia formation precision
Core Design Contradiction:
Object-affected harmful factorsVSManufacturing precision

Solution Approach 1:

Instead of uniformly increasing substrate thickness, the invention applies local thickness variation: the substrate has a first thickness in the first region and a second thickness (greater than the first) in the second region where the power via is formed. This localized approach reduces power transmission noise in critical areas while maintaining manufacturable via aspect ratios in specific regions.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS20240047305A1Integrated circuit semiconductor device
Publication Date: 2024.02.08 SAMSUNG ELECTRONICS CO LTD
  • US20240047305A1 patent drawing
  • US20240047305A1 patent drawing
  • US20240047305A1 patent drawing

AI summary

An integrated circuit semiconductor device includes a substrate having a first surface and a second surface opposite to the first surface; a power via penetrating between the first surface and the second surface of the substrate; a cell part including a plurality of individual elements having different thicknesses inside the substrate, and a recess positioned between the individual elements; a signal wiring part on the first surface of the substrate and including an upper multilayer wiring layer connected to the power via; a power transmission network part under the second surface of the substrate and including a lower multilayer wiring layer connected to the power via; and an external connection terminal under the power transmission network part and connected to the lower multilayer wiring layer, wherein the substrate includes a plurality of regions having different thicknesses.