IC Test Database Generation via Layout-Based Defect Location

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional IC testing methods are inefficient due to the rough determination of possible defect locations, leading to unnecessary tests and prolonged testing times, as locations between metal lines are often incorrectly identified as defective even when no defects are present.

Innovation Solution

An electronic device test database generating method and apparatus that acquire cell layout information to precisely determine possible defect locations, reducing unnecessary tests by using distance and component thresholds to identify potential defects, and generating a test database based on these results.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional IC testing method transmits testing signals to all possible defect locations, then defect detection coverage is improved, but testing time is prolonged due to unnecessary tests

Engineering Contradiction:
Improvedefect detection coverageVSAvoidtesting time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent performs preliminary analysis of cell layout information before testing to generate accurate possible defect location information. By pre-processing the layout data to identify actual defect locations based on distance thresholds and component relationships, the system avoids performing unnecessary tests on locations that cannot have defects, thus reducing testing time while maintaining defect detection coverage

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent extracts only the necessary defect location information from the complete cell layout, separating actual possible defect locations from non-defect areas. By using distance thresholds and component relationship analysis, the system extracts precisely those locations where defects can occur, eliminating unnecessary test locations and reducing overall testing time

Inventive Principle:
Principle #2Taking out (Extraction)

2Ease of operation

If conventional IC testing method determines possible defect locations roughly, then testing process is simplified, but measurement precision of defect locations is reduced

Engineering Contradiction:
Improvetesting process simplicityVSAvoiddefect location precision
Core Design Contradiction:
Ease of operationVSMeasurement precision

Solution Approach 1:

The patent changes the parameter of defect location determination from rough approximation to precise calculation by introducing specific distance thresholds and component relationship criteria. The system calculates actual distances between metal lines and analyzes component relationships to precisely identify possible defect locations, improving measurement precision while maintaining operational simplicity through automated processing

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11163003B2Electronic device test database generating method and electronic device test database generating apparatus
Publication Date: 2021.11.02 REALTEK SEMICON CORP
  • US11163003B2 patent drawing
  • US11163003B2 patent drawing
  • US11163003B2 patent drawing

AI summary

An electronic device test database generating method, comprising: (a) acquiring cell layout information of a target electronic device; (b) generating possible defect location information of the target electronic device according to the cell layout information, wherein the possible defect location information comprises at least one possible defect location of the target electronic device; (c) testing the target electronic device according to the possible defect location information to generate a testing result; and (d) generating an electronic device test database according to the testing result.