Integrated Circuit Test Apparatus Stuck State Detection

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Solution Overview

Problem

Existing integrated circuit test methods, particularly the built-in self test (BIST) method, fail to accurately determine if internal circuits are in a stuck state during the reset operation, as the signal output during the BIST test has an initial value and does not provide detailed information about internal circuit functionality.

Innovation Solution

An integrated circuit test apparatus with a first test unit that outputs current for BIST progress states and a determination module to assess if internal circuits are stuck, using current detection and logic signal changes to determine if each circuit is in a stuck state, allowing for precise identification of stuck conditions in power-on reset, analog, and digital circuits during the wake-up mode.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Extent of automation

If the BIST method is used to test internal circuits, then the test automation is improved, but the ability to detect stuck states in internal circuits deteriorates

Engineering Contradiction:
Improvetest automationVSAvoidstuck state detection accuracy
Core Design Contradiction:
Extent of automationVSMeasurement precision

Solution Approach 1:

The patent introduces a current detection unit as an intermediary to detect stuck states. The current detection unit measures current at different nodes during BIST operations, providing indirect information about internal circuit states that cannot be directly observed through normal signal outputs. This mediator enables stuck state detection while maintaining the automated BIST framework.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent changes the detection parameter from signal level to current level. By measuring current consumption and current at different nodes during BIST operations, the system can infer stuck states that are not visible through traditional signal output methods. This parameter transformation enables detection of internal circuit failures while preserving test automation.

Inventive Principle:
Principle #35Parameter changes

2Stability of the object's composition

If the reset operation is performed during BIST test, then the circuit initialization is improved, but the information about internal circuit states is lost

Engineering Contradiction:
Improvecircuit initializationVSAvoidinternal circuit state information
Core Design Contradiction:
Stability of the object's compositionVSLoss of information

Solution Approach 1:

The patent performs preliminary current detection before and during the reset operation. By measuring current at different nodes before reset is activated and monitoring current changes during reset progression, the system captures information about which circuits fail to reset properly. This preliminary and ongoing measurement preserves state information that would otherwise be lost during initialization.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback through continuous current monitoring during the reset process. The current detection unit provides real-time feedback about the state of internal circuits as they transition through reset states. This feedback mechanism allows the system to identify stuck states by detecting abnormal current patterns that indicate circuits are not responding to reset signals as expected.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS11587634B2Integrated circuit test apparatus
Publication Date: 2023.02.21 HYUNDAI MOBIS CO LTD
  • US11587634B2 patent drawing
  • US11587634B2 patent drawing
  • US11587634B2 patent drawing

AI summary

An integrated circuit test apparatus includes: a first test unit configured to output a current for a built-in self test (BIST) progress state for each internal circuit of an integrated circuit in a BIST test mode and to determine whether each internal circuit operates normally in a wake-up mode of the integrated circuit; and a first determination module configured to determine whether each internal circuit is in a stuck state based on a change detected by the first test unit.