Automated Test Vector Generation for Integrated Circuits
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Solution Overview
Problem
Manual creation of test vectors for integrated circuits is time-consuming and error-prone, and current methods lack an automated approach for simulating entire IC designs effectively.
Innovation Solution
A method and apparatus for generating test and simulation vectors using a test function specified with elementary functions that encapsulate program code associated with the IC architecture, executed by a test generator engine to produce vectors for programmable logic devices, which can be applied directly to the device or through automatic test equipment, or used for design simulation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If manual creation of test vectors is used, then engineers can create test vectors with understanding of circuit logic, but the process is time-consuming and error-prone
Solution Approach 1:
The patent replaces the manual mechanical process of creating test vectors with an automated computer-based system. The test generator automatically creates test vectors by processing circuit description data and test specifications, eliminating manual handwriting or entry of test vectors while maintaining accuracy through systematic algorithms.
Solution Approach 2:
The test generation system is self-service in that it automatically generates test vectors without requiring manual intervention for each vector. The system takes circuit descriptions and test specifications as input, then autonomously produces the complete set of test vectors, reducing both time and potential human errors.
2Reliability
If manual simulation vector creation is performed for each circuit component, then design verification can be ensured, but the process is time-consuming and error-prone
Solution Approach 1:
The test generator is designed as a universal system that can handle multiple circuit components and designs through a single automated process. Rather than requiring separate manual simulation vector creation for each component, the system processes entire circuit designs uniformly, maintaining verification quality while dramatically improving productivity.
Solution Approach 2:
The system performs preliminary automated generation of simulation vectors based on circuit descriptions before actual design verification is needed. This advance preparation of test data ensures verification quality is maintained while eliminating the time-consuming manual process of creating vectors for each component during the verification phase.
3Productivity
If automated test vector generation is implemented, then time consumption and human error are reduced, but the system complexity increases
Solution Approach 1:
The patent introduces an intermediary test generator system that bridges the gap between simple manual processes and complex automated testing. This intermediary layer automatically transforms circuit descriptions into test vectors, providing the productivity benefits of automation while encapsulating the complexity within a manageable software interface that users can operate without understanding the underlying complex algorithms.
Data Source
AI summary
Method, apparatus, and computer readable medium for generating test vectors for an integrated circuit (IC) under test is described. In one example, a test function is specified using at least one elementary function that encapsulates program code associated with an architecture of the IC under test. An engine is configured with device description data for the IC under test. The engine is executed with the test function as parametric input to generate the test vectors. In one example, the IC under test comprises a programmable logic device (PLD) and the test vectors include configuration data for configuring a pattern in the PLD and at least one test vector for exercising the pattern. The test vectors may be applied directly to the device or through automatic test equipment (ATE). Alternatively, the test vectors may be applied to a IC design simulation of the device.