IC Chip Testing Interface Reducing Wiring Overhead via Data Segmentation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In multiple integrated circuit (IC) chip devices, high wiring overhead and long instruction lengths increase manufacturing costs and testing time due to the need for numerous wires to communicate test data at high frequencies.
Innovation Solution
The implementation of a testing circuitry in IC chips that encodes static test data to reduce the number of wires required, while keeping dynamic data non-encoded to minimize errors, allowing for efficient communication of test data between main and auxiliary IC chips.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If test data is communicated at high frequency (100 MHz or greater), then testing speed is improved, but wiring overhead increases (more wires needed)
Solution Approach 1:
The patent segments test data into static portions and dynamic portions, applying different encoding strategies to each. Static portions are encoded to reduce wiring overhead, while dynamic portions are transmitted without encoding to maintain high testing speed. This segmentation resolves the contradiction by allowing selective optimization of different data components.
Solution Approach 2:
The patent changes the encoding parameter of test data based on its characteristics. By identifying and encoding only the static portion of test data while leaving the dynamic portion unencoded, the system achieves both reduced wiring overhead and maintained high testing speed, resolving the technical contradiction between these two parameters.
2Quantity of substance
If more wires are used to communicate test data, then data transmission capability is improved, but manufacturing cost increases
Solution Approach 1:
The patent segments test data into static and dynamic portions, encoding only the static portion to reduce the number of wires required. This segmentation allows the system to maintain full data transmission capability while using fewer wires, thereby reducing manufacturing cost without sacrificing transmission capability.
Solution Approach 2:
The patent creates an encoded representation of static test data that requires fewer physical wires to transmit the same information. By encoding static portions, the system effectively copies the information in a more compact form, reducing wire count and manufacturing cost while preserving complete data transmission capability.
3Loss of information
If instruction length is increased to communicate more test data, then data coverage is improved, but testing time increases
Solution Approach 1:
The patent segments test data into static and dynamic portions that can be processed independently. By encoding static portions and transmitting them efficiently, the system achieves complete data coverage without requiring excessively long instructions, thereby reducing overall testing time while maintaining comprehensive test data coverage.
Solution Approach 2:
The patent changes the encoding parameter for static test data portions, allowing more information to be transmitted in fewer clock cycles. This parameter change enables complete data coverage to be achieved with shorter effective instruction lengths, reducing testing time while maintaining full data coverage.
Data Source
AI summary
An integrated circuit (IC) chip device includes testing interface circuity and testing circuitry to test the operation of the IC chips of the IC chip device. The IC chip device includes a first IC chip that comprises first testing circuitry. The first testing circuitry receives a mode select signal, a clock signal, and encoded signals, and comprises finite state machine (FSM) circuitry, decoder circuitry, and control circuitry. The FSM circuitry determines an instruction based on the mode select signal and the clock signal. The decoder circuitry decodes the encoded signals to generate a decoded signal. The control circuitry generates a control signal from the instruction and the decoded signal. The control signal indicates a test to be performed by the first testing circuitry.