IC Redistribution Layer Thermal Meshing for Faster Accurate Analysis
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Solution Overview
Problem
Existing IC design processes face challenges in accurately predicting and managing heat distribution and dissipation during manufacturing, leading to potential device failure and reliability issues due to excessive temperatures and uneven heat distributions.
Innovation Solution
A thermal analysis is performed using customized modeling rules for conductive layers and boundary conditions based on the connectivity of off-chip interconnects, allowing for balanced accuracy and processing time in IC design verification.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If detailed thermal simulation models are used for all conductive layers, then thermal analysis accuracy is improved, but processing time increases significantly
Solution Approach 1:
The patent segments the conductive layers into different groups based on their thickness characteristics. Thin conductive layers are modeled using simplified 2D models, while thick conductive layers use detailed 3D models. This segmentation allows the thermal simulation to focus computational resources on layers that require higher accuracy, thereby reducing overall processing time while maintaining necessary accuracy for critical layers.
Solution Approach 2:
The patent applies different modeling qualities to different regions of the thermal simulation model. Specifically, thick conductive layers that have significant impact on heat dissipation are modeled with high detail (3D models), while thin layers are modeled with lower detail (2D models). This local differentiation of quality ensures that computational accuracy is concentrated where it is most needed, optimizing the balance between accuracy and processing time.
2Productivity
If simplified thermal models are used for thin conductive layers, then processing time is reduced, but thermal analysis accuracy may be compromised
Solution Approach 1:
The patent segments conductive layers by thickness, creating distinct modeling categories. Thin conductive layers are identified and assigned simplified 2D thermal models, which reduce computational complexity and processing time. This segmentation ensures that simplified models are applied only where appropriate, preventing accuracy loss in layers where it would be problematic.
Solution Approach 2:
The patent changes the modeling parameters (dimensionality) based on the physical parameter (thickness) of the conductive layers. For thin layers, the model transitions from 3D to 2D representation, changing the mathematical parameters of the thermal simulation while maintaining physical accuracy. This parameter adaptation allows simplified modeling without compromising the essential thermal behavior of thin layers.
3Device complexity
If uniform boundary conditions are applied to all off-chip interconnects, then model complexity is reduced, but thermal dissipation accuracy decreases
Solution Approach 1:
The patent applies local quality by assigning different boundary conditions to different off-chip interconnects based on their specific characteristics and connectivity. Rather than using a uniform boundary condition for all interconnects, the model tailors the thermal boundary conditions to match the actual thermal dissipation capabilities of each interconnect type, thereby improving accuracy without excessive complexity increase.
Solution Approach 2:
The patent introduces dynamic boundary conditions that adapt to the specific thermal characteristics of each off-chip interconnect. The boundary conditions are not static and uniform but are dynamically assigned based on the interconnect's connectivity and thermal properties, allowing the model to accurately represent varying thermal dissipation paths while maintaining manageable complexity through systematic assignment rules.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the accuracy of thermal simulations while reducing runtime, preventing heat-related performance issues and improving IC device reliability by optimizing heat dissipation pathways.
Implementation Method 1
a thermal simulation for the IC layout is performed using models of a plurality of conductive layers in the redistribution structure
Data Source
AI summary
A system includes a processor for performing a thermal analysis for an IC layout, which includes a redistribution structure having a plurality of conductive layers stacked in a thickness direction. Based on a thickness of each conductive layer of the plurality of conductive layers along the thickness direction and a width of conductive patterns in the conductive layer, the processor divides the plurality of conductive layers into a plurality of different groups each including one or more conductive layers. The processor applies a plurality of different partitioning rules correspondingly to the plurality of different groups, to partition the plurality of conductive layers into a plurality of meshes. The processor performs a thermal simulation for the IC layout based on the plurality of meshes, and, based on the thermal simulation result, modifies the IC layout or proceeds with manufacturing one or more IC devices corresponding to the IC layout.