IC Thermal Sensing Resistor Layout for Hotspot Temperature Accuracy
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Solution Overview
Problem
The miniaturization of semiconductor devices leads to increased thermal management challenges due to high power density, necessitating accurate temperature measurement at specific circuit blocks within integrated circuits (ICs) to prevent overheating and ensure efficient heat dissipation.
Innovation Solution
Incorporating a thermal sensing resistor into the design flow for digital regions of ICs, utilizing metallization layers and via layers, allowing for precise temperature measurement at areas of interest without inherent junction voltage, and integrating it with a back-end-of-line (BEOL) process to reduce production costs and design overhead.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If traditional temperature measurement methods are used in miniaturized IC devices, then device integration density is improved, but measurement precision deteriorates due to inability to accurately measure temperature at specific heat source locations
Solution Approach 1:
The patent divides the IC device into distinct regions: digital regions containing digital circuitry and analog regions containing temperature sensor circuits. This segmentation allows independent optimization of each region, enabling high integration density in digital regions while maintaining measurement precision through dedicated sensor placement in analog regions near heat sources.
Solution Approach 2:
The patent introduces thermal sensing resistors as intermediary elements that indirectly measure temperature at heat sources. These resistors are placed in thermal contact with digital circuit blocks and their resistance changes provide temperature information without requiring direct measurement at the heat source, thus maintaining measurement precision while allowing high integration density.
2Measurement precision
If thermal sensing resistors are integrated into digital regions, then measurement precision is improved, but device complexity increases due to additional layers and process steps
Solution Approach 1:
The patent merges the thermal sensing resistor fabrication process with the existing back-end-of-line (BEOL) metallization process. The thermal sensing resistors are formed using the same metallization layers (e.g., M3, M4, M5) and process steps already required for digital circuit interconnects, thereby integrating temperature sensing functionality without adding separate fabrication steps or increasing structural complexity.
Solution Approach 2:
The metallization layers in the IC device serve multiple functions: they provide electrical interconnects for digital circuits and simultaneously serve as the conductive path for thermal sensing resistors. This multi-functionality allows temperature measurement capability to be added without requiring additional dedicated layers, thus avoiding increased device complexity.
3Measurement precision
If separate temperature sensor circuits are added, then measurement precision is improved, but production cost increases due to additional manufacturing steps
Solution Approach 1:
The patent combines the thermal sensing resistor formation with the standard BEOL metallization process that is already required for digital circuit fabrication. By using the same process steps, materials, and equipment for both digital interconnects and temperature sensors, the patent avoids additional manufacturing steps and associated costs.
Solution Approach 2:
The same metallization layers and process tools are used to create both the digital circuit interconnects and the thermal sensing resistor elements. This universal usage of existing manufacturing capabilities eliminates the need for separate production lines or additional process steps, thereby maintaining cost-effectiveness while achieving precise temperature measurement.
4Measurement precision
If thermal sensing resistors are placed close to heat sources, then measurement precision is improved, but device complexity increases due to routing and placement constraints
Solution Approach 1:
The patent utilizes the vertical dimension by placing thermal sensing resistors in upper metallization layers (e.g., M3, M4, M5) above the digital circuit blocks. This vertical placement allows the sensing resistors to be thermally coupled to heat sources while maintaining electrical routing flexibility in available layer spaces, thereby reducing routing complexity compared to planar placement constraints.
Solution Approach 2:
The patent segments the device into digital regions and analog regions, with thermal sensing resistors placed at the interfaces or within analog regions adjacent to digital heat sources. This spatial segmentation allows close thermal coupling for precise measurement while separating the sensing circuitry from dense digital logic, thereby simplifying routing and placement.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Improves measurement accuracy of IC temperatures at heat sources, reduces production costs, and enhances thermal management by placing thermal sensing resistors close to areas of interest, thus preventing overheating and ensuring reliable IC operation.
Implementation Method 1
a thermal sensing resistor in a subset of a plurality of metallization layers of the layout plan and a subset of a plurality of via layers of the layout plan over the digital region
Data Source
AI summary
An embodiment method of forming a layout plan of an integrated circuit (IC) device includes obtaining a placement of a plurality of digital circuit cells in a region of a layout plan; obtaining an initial placement of one or more thermal sensing resistor cells in a subset of a plurality of metallization layers and a subset of a plurality of via layers of the layout plan; obtaining a routing plan based on a clock tree synthesis and the initial placement of the one or more thermal sensing resistor cells; performing a thermal analysis based on the placement of the plurality of digital circuit cells and the routing plan to identify one or more areas of interest in the region of the layout plan; and obtaining a refined placement of the one or more thermal sensing resistor cells respectively over the one or more areas of interest.