IC Throttle Request Accumulation for Rapid Power Control

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Solution Overview

Problem

In processor-based systems, there is a delay in responding to power consumption events due to the large die area, leading to temporary excess power consumption that can cause thermal and power issues, such as di/dt events and voltage droop, before the power management circuit can react.

Innovation Solution

A hierarchical power management system with local area management (LAM) circuits and a centralized power estimation and limit (PEL) circuit, combined with a throttle request accumulate circuit, to quickly adjust power consumption by accumulating throttle requests and generating a throttle control signal based on the highest throttle value, reducing response time and preventing excess power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a centralized power management circuit is used to control power consumption, then power management functionality is achieved, but response time to power events is delayed due to large die area

Engineering Contradiction:
Improvepower management controlVSAvoidresponse time to power events
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The power management system is segmented into local area management (LAM) circuits distributed across different regions of the die, each responsible for monitoring and controlling power events in its local region. This segmentation reduces the effective distance power management signals must travel, thereby reducing response time while maintaining comprehensive power management coverage across the entire die area.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a hierarchical dimension to power management by organizing LAM circuits in multiple levels or layers. Local area management circuits operate at the first level for immediate local response, while higher-level management circuits provide coordinated control. This multi-dimensional organization allows simultaneous local rapid response and global power management, resolving the contradiction between fast local response and comprehensive control.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Device complexity

If power adjustments are delayed, then centralized control simplicity is maintained, but thermal and power issues such as di/dt events and voltage droop occur

Engineering Contradiction:
Improvecentralized control structureVSAvoidthermal and power issues
Core Design Contradiction:
Device complexityVSObject-affected harmful factors

Solution Approach 1:

Local area management circuits continuously monitor power consumption and prepare throttle requests in advance based on predicted power events. When a power event is detected, the LAM circuits immediately generate and transmit throttle requests without waiting for centralized circuit analysis, preventing di/dt events and voltage droop before they can occur. The centralized circuit then validates and coordinates these pre-prepared throttle requests.

Inventive Principle:
Principle #10Preliminary action

3Loss of time

If local area management circuits are added to reduce response time, then response speed improves, but device complexity increases

Engineering Contradiction:
Improveresponse time to power eventsVSAvoidpower management circuit structure
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The local area management circuits are designed as universal, standardized modules that can be replicated across multiple regions of the die. Each LAM circuit performs the same set of functions (monitoring, throttle request generation, and local control), making them interchangeable and simplifying the overall design. This universality reduces the complexity burden by providing a modular, scalable architecture rather than requiring custom circuits for each region.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent introduces throttle request accumulation circuits as intermediary components between LAM circuits and the centralized power management circuit. These accumulation circuits aggregate throttle requests from multiple LAM circuits and coordinate them before forwarding to the centralized controller, reducing the communication overhead and coordination complexity. The intermediary layer simplifies the interaction between numerous LAM circuits and the central controller, making the expanded system more manageable.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS12366905B2Integrated circuits (IC) chips including throttle request accumulate circuits for controlling power consumed in processing circuits and related methods
Publication Date: 2025.07.22 QUALCOMM INC
  • US12366905B2 patent drawing
  • US12366905B2 patent drawing
  • US12366905B2 patent drawing

AI summary

The processor-based system includes a throttle request accumulate circuit to receive throttle requests, determine a highest or most aggressive throttle value among the throttle requests, and generate a throttle control signal configured to throttle activity in the plurality of processing circuits. Throttle requests have throttle values corresponding to a reduction in activity in at least a portion of the plurality of processing circuits and may correspond to a particular number of cycles of reduced activity in a window of cycles. In addition to reducing response time to local events or conditions compared to waiting for a hierarchical response, the throttle request accumulate circuit accumulates throttle requests from all circuits that adjust or throttle activity in the plurality of processing circuits, and ensures that the net effective throttle controlling activity in the processing circuits at any given time is based on the highest throttle value of those accumulated throttle requests.