Integrated Circuit Transistor Segments for Homogeneous ESD Triggering
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Solution Overview
Problem
Variable strength output drivers in integrated circuits are sensitive to electrostatic discharge (ESD), leading to inhomogeneous conduction and potential device failure due to uneven triggering of parasitic bipolar devices during ESD events.
Innovation Solution
The integration of multiple transistor segments with a common output node, where each segment's drain region is coupled to trigger parasitic bipolar devices uniformly, enhancing ESD robustness by ensuring homogeneous triggering across all devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If parallel output drivers are selectively activated to achieve variable drive strength, then drive strength flexibility is improved, but sensitivity to electrostatic discharge worsens due to inhomogeneous conduction
Solution Approach 1:
The output driver is divided into multiple parallel driver stages, each with selectable transistor segments. This segmentation allows independent control of each segment while maintaining uniform ESD triggering across all segments through shared well region coupling, resolving the contradiction between drive strength flexibility and ESD robustness
Solution Approach 2:
Multiple transistor segments from different driver stages are merged into a common well region structure where their drain regions are coupled to the same well. This merging ensures that ESD pulses trigger parasitic bipolar devices uniformly across all segments simultaneously, improving ESD robustness while maintaining variable drive strength capability
2Reliability
If additional ESD protection devices are attached to protect against electrostatic discharge, then ESD robustness is improved, but device complexity and area usage worsen
Solution Approach 1:
The output driver structure itself provides ESD protection through its inherent parasitic bipolar devices that are uniformly triggered by ESD pulses. The shared well region coupling causes all transistor segments to turn on simultaneously during ESD events, allowing the driver to protect itself without external ESD protection devices, thereby reducing device complexity and area
3Reliability
If additional ESD protection devices are attached to protect against electrostatic discharge, then ESD robustness is improved, but leakage current increases
Solution Approach 1:
The driver structure uses its own parasitic bipolar devices for ESD protection, eliminating the need for separate ESD protection devices that would contribute to leakage current. The uniform triggering mechanism ensures efficient ESD current dissipation through the existing driver transistors, reducing overall leakage
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution provides improved ESD hardness and uniform current flow, reducing the risk of device failure and thermal destruction, while eliminating the need for additional ESD protection devices, thus optimizing area usage and reducing leakage current.
Implementation Method 1
an electrostatic discharge pulse applied to a common output node homogenously triggers parasitic bipolar devices coupled to each drain region
Implementation Method 2
triggers parasitic bipolar devices coupled to each drain region of the plurality of first transistor segments and the drain region of the at least one second transistor segment
Data Source
AI summary
In accordance with an embodiment, an integrated circuit has a first transistor made of a plurality of first transistor segments disposed in a well area, and a second transistor made of at least one second transistor segment. Drain regions of the plurality of first transistor segments and the at least one second transistor segment are coupled to a common output node. The at least one second transistor segment is disposed in the well area such that an electrostatic discharge pulse applied to a common output node homogenously triggers parasitic bipolar devices coupled to each drain region of the plurality of first transistor segments and the drain region of the at least one second transistor segment.


