IC Vector Generation for Power Analysis
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Solution Overview
Problem
Current methods for worst-case power consumption and voltage drop analysis in integrated circuit design are inefficient due to the need to simulate billions of clock cycles, making them time and cost-intensive.
Innovation Solution
A method and system that simulate switching operations from one operating state to another using user-specified constraints, generating time-based waveforms to identify and verify operating state changes, and producing an analysis report with a subset of vectors that meet these constraints, thereby reducing the complexity and cost of power and voltage drop analysis.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If long vectors are generated based on simulation data over millions or billions of clock cycles, then power and voltage drop analysis can be performed, but the analysis becomes very expensive in terms of time and money
Solution Approach 1:
The patent performs preliminary action by generating test vectors and identifying switching vectors before the actual power and voltage drop analysis. The system pre-processes the circuit design to determine which vectors will cause switching, and uses this information to guide the subsequent analysis, avoiding the need to simulate billions of clock cycles during the actual analysis phase.
Solution Approach 2:
The patent segments the analysis process into distinct phases: vector generation, switching vector identification, and power/voltage drop analysis. By dividing the problem into manageable segments and processing them sequentially, the system avoids the computational burden of simultaneous full-circuit simulation and analysis.
2Extent of automation
If random number generators are used to determine switching activity, then vector generation can be automated, but logic consistency may be compromised
Solution Approach 1:
The patent implements feedback by using the circuit's logic structure to validate and guide vector generation. The system checks whether generated vectors produce valid switching conditions based on the circuit's logical relationships, ensuring that automation does not compromise logic consistency. The feedback loop verifies that switching vectors are logically sound before proceeding with analysis.
3Ease of manufacture
If switching vectors are generated using algorithms with random number generators, then the process can be simplified, but the determination of cell states becomes less accurate
Solution Approach 1:
The patent changes the approach from random probability-based vector generation to a deterministic method based on switching activity parameters. Instead of using random number generators, the system systematically determines cell states by analyzing switching conditions, thereby improving accuracy while maintaining process simplicity through algorithmic determination.
Data Source
AI summary
A system and method for performing operating state analysis of an integrated circuit (IC) design is disclosed. The method includes simulating a switching operation from a first operating state to a second operating state for one or more cells of the IC design using a plurality of vectors corresponding to one or more user-specified constraints. The method include generating a time-based waveform for each cell of the one or more cells changing an operating state from the first operating state to the second operating state, and based on the generated time-based waveform, identifying one or more operating state changes corresponding to the operating state analysis and associated timing window and cell information. The method includes verifying the one or more operating state changes by the each cell of the one or more cells of the IC design meet the one or more user-specified constraints for generating an analysis report.